riscv/rocket-chip
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refactored vector exception handling interface

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This commit is contained in:
Yunsup Lee
2012-03-13 23:45:10 -07:00
parent b100544b25
commit 040d62f372
8 changed files with 91 additions and 90 deletions
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8
rocket/src/main/scala/cpu.scala
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@ -205,10 +205,10 @@ class rocketProc(resetSignal: Bool = null) extends Component(resetSignal)
vu.io.xcpt.exception := ctrl.io.vec_iface.exception
ctrl.io.vec_iface.exception_ack_valid := vu.io.xcpt.exception_ack_valid
vu.io.xcpt.exception_ack_ready := ctrl.io.vec_iface.exception_ack_ready
vu.io.xcpt.backup := dpath.io.vec_iface.backup
vu.io.xcpt.backup_addr := dpath.io.vec_iface.backup_addr.toUFix
vu.io.xcpt.kill := dpath.io.vec_iface.kill
vu.io.xcpt.hold := dpath.io.vec_iface.hold
vu.io.xcpt.evac := ctrl.io.vec_iface.evac
vu.io.xcpt.evac_addr := dpath.io.vec_iface.evac_addr.toUFix
vu.io.xcpt.kill := ctrl.io.vec_iface.kill
vu.io.xcpt.hold := ctrl.io.vec_iface.hold
// hooking up vector memory interface
val storegen = new StoreDataGen