2016-11-28 01:16:37 +01:00
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// See LICENSE.SiFive for license details.
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// See LICENSE.Berkeley for license details.
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2016-09-15 22:04:01 +02:00
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package groundtest
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2016-08-11 02:20:00 +02:00
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import Chisel._
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import rocket._
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2016-10-04 00:17:36 +02:00
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import diplomacy._
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2016-08-11 02:20:00 +02:00
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import uncore.tilelink._
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import uncore.coherence._
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import uncore.agents._
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2016-11-22 20:50:41 +01:00
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import uncore.util._
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2016-08-11 02:20:00 +02:00
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import uncore.devices.NTiles
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import junctions._
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2016-11-18 23:05:14 +01:00
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import config._
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2016-08-11 02:20:00 +02:00
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import scala.math.max
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2016-09-15 22:04:01 +02:00
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import coreplex._
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import rocketchip._
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/** Actual testing target Configs */
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class GroundTestConfig extends Config(new WithGroundTest ++ new BaseConfig)
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class ComparatorConfig extends Config(
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new WithComparator ++ new GroundTestConfig)
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class ComparatorL2Config extends Config(
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new WithAtomics ++ new WithPrefetches ++
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new WithL2Cache ++ new ComparatorConfig)
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class ComparatorBufferlessConfig extends Config(
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new WithBufferlessBroadcastHub ++ new ComparatorConfig)
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class ComparatorStatelessConfig extends Config(
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new WithStatelessBridge ++ new ComparatorConfig)
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class MemtestConfig extends Config(new WithMemtest ++ new GroundTestConfig)
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class MemtestL2Config extends Config(
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new WithL2Cache ++ new MemtestConfig)
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class MemtestBufferlessConfig extends Config(
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new WithBufferlessBroadcastHub ++ new MemtestConfig)
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class MemtestStatelessConfig extends Config(
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new WithNGenerators(0, 1) ++ new WithStatelessBridge ++ new MemtestConfig)
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// Test ALL the things
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class FancyMemtestConfig extends Config(
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new WithNGenerators(1, 2) ++ new WithNCores(2) ++ new WithMemtest ++
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2016-11-19 01:17:28 +01:00
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new WithNMemoryChannels(1) ++ new WithNBanksPerMemChannel(4) ++ // !!! waiting on Chisel3 support for 2 channels
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2016-11-18 21:02:33 +01:00
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new WithL2Cache ++ new GroundTestConfig)
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2016-09-15 22:04:01 +02:00
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class CacheFillTestConfig extends Config(
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2017-01-13 23:41:19 +01:00
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new WithNL2Ways(4) ++ new WithL2Capacity(4) ++ new WithCacheFillTest ++ new WithL2Cache ++ new GroundTestConfig)
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2016-09-15 22:04:01 +02:00
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class BroadcastRegressionTestConfig extends Config(
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new WithBroadcastRegressionTest ++ new GroundTestConfig)
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class BufferlessRegressionTestConfig extends Config(
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new WithBufferlessBroadcastHub ++ new BroadcastRegressionTestConfig)
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class CacheRegressionTestConfig extends Config(
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new WithCacheRegressionTest ++ new WithL2Cache ++ new GroundTestConfig)
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class TraceGenConfig extends Config(
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new WithNCores(2) ++ new WithTraceGen ++ new GroundTestConfig)
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class TraceGenBufferlessConfig extends Config(
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new WithBufferlessBroadcastHub ++ new TraceGenConfig)
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class TraceGenL2Config extends Config(
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new WithNL2Ways(1) ++ new WithL2Capacity(32 * 64 / 1024) ++
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new WithL2Cache ++ new TraceGenConfig)
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2016-09-28 00:11:31 +02:00
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class Edge128BitComparatorConfig extends Config(
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new WithEdgeDataBits(128) ++ new ComparatorConfig)
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class Edge128BitMemtestConfig extends Config(
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new WithEdgeDataBits(128) ++ new MemtestConfig)
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2016-09-15 22:04:01 +02:00
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2016-09-28 00:11:31 +02:00
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class Edge32BitComparatorConfig extends Config(
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new WithEdgeDataBits(32) ++ new ComparatorL2Config)
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class Edge32BitMemtestConfig extends Config(
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new WithEdgeDataBits(32) ++ new MemtestConfig)
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2016-09-15 22:04:01 +02:00
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/* Composable Configs to set individual parameters */
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2017-01-13 23:41:19 +01:00
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class WithGroundTest extends Config((site, here, up) => {
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case TLKey("L1toL2") => {
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val useMEI = site(NTiles) <= 1
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val dataBeats = (8 * site(CacheBlockBytes)) / site(XLen)
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TileLinkParameters(
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coherencePolicy = (
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if (useMEI) new MEICoherence(site(L2DirectoryRepresentation))
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else new MESICoherence(site(L2DirectoryRepresentation))),
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nManagers = site(BankedL2Config).nBanks + 1,
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nCachingClients = 1,
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nCachelessClients = 1,
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maxClientXacts = ((site(DCacheKey).nMSHRs + 1) +:
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site(GroundTestKey).map(_.maxXacts))
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.reduce(max(_, _)),
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maxClientsPerPort = site(GroundTestKey).map(_.uncached).sum,
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maxManagerXacts = site(NAcquireTransactors) + 2,
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dataBeats = dataBeats,
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dataBits = site(CacheBlockBytes)*8)
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}
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case FPUKey => None
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case UseAtomics => false
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case UseCompressed => false
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})
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class WithComparator extends Config((site, here, up) => {
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case GroundTestKey => Seq.fill(site(NTiles)) {
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GroundTestTileSettings(uncached = 2)
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}
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case BuildGroundTest =>
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(p: Parameters) => Module(new ComparatorCore()(p))
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case ComparatorKey => ComparatorParameters(
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targets = Seq(site(ExtMem).base, testRamAddr),
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width = 8,
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operations = 1000,
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atomics = site(UseAtomics),
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prefetches = false)
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case FPUConfig => None
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case UseAtomics => false
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})
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class WithAtomics extends Config((site, here, up) => {
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case UseAtomics => true
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})
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class WithPrefetches extends Config((site, here, up) => {
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case ComparatorKey => up(ComparatorKey, site).copy(prefetches = true)
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})
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class WithMemtest extends Config((site, here, up) => {
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case GroundTestKey => Seq.fill(site(NTiles)) {
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GroundTestTileSettings(1, 1)
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}
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case GeneratorKey => TrafficGeneratorParameters(
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maxRequests = 128,
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startAddress = BigInt(site(ExtMem).base))
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case BuildGroundTest =>
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(p: Parameters) => Module(new GeneratorTest()(p))
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})
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class WithNGenerators(nUncached: Int, nCached: Int) extends Config((site, here, up) => {
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case GroundTestKey => Seq.fill(site(NTiles)) {
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GroundTestTileSettings(nUncached, nCached)
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}
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})
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class WithCacheFillTest extends Config((site, here, up) => {
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case GroundTestKey => Seq.fill(site(NTiles)) {
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GroundTestTileSettings(uncached = 1)
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}
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case BuildGroundTest =>
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(p: Parameters) => Module(new CacheFillTest()(p))
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})
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class WithBroadcastRegressionTest extends Config((site, here, up) => {
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case GroundTestKey => Seq.fill(site(NTiles)) {
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GroundTestTileSettings(1, 1, maxXacts = 3)
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}
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case BuildGroundTest =>
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(p: Parameters) => Module(new RegressionTest()(p))
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case GroundTestRegressions =>
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(p: Parameters) => RegressionTests.broadcastRegressions(p)
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})
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class WithCacheRegressionTest extends Config((site, here, up) => {
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case GroundTestKey => Seq.fill(site(NTiles)) {
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GroundTestTileSettings(1, 1, maxXacts = 5)
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}
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case BuildGroundTest =>
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(p: Parameters) => Module(new RegressionTest()(p))
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case GroundTestRegressions =>
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(p: Parameters) => RegressionTests.cacheRegressions(p)
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})
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class WithTraceGen extends Config((site, here, up) => {
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case GroundTestKey => Seq.fill(site(NTiles)) {
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GroundTestTileSettings(uncached = 1, cached = 1)
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}
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case BuildGroundTest =>
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(p: Parameters) => Module(new GroundTestTraceGenerator()(p))
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case GeneratorKey => TrafficGeneratorParameters(
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maxRequests = 8192,
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startAddress = 0)
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case AddressBag => {
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val nSets = 2
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val nWays = 1
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val blockOffset = site(CacheBlockOffsetBits)
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val nBeats = site(TLKey("L1toL2")).dataBeats
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List.tabulate(4 * nWays) { i =>
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Seq.tabulate(nBeats) { j => BigInt((j * 8) + ((i * nSets) << blockOffset)) }
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}.flatten
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}
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case UseAtomics => true
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case CacheName("L1D") => up(CacheName("L1D"), site).copy(nSets = 16, nWays = 1)
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})
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