rocket-chip/.travis.yml

language: scala
# run on new infrastructure
sudo: false
cache:
  apt: true
  directories:
    $HOME/.ivy2
    regression/install
    chisel/target
    context-dependent-environments/target
    groundtest/target
    hardfloat/target
    junctions/target
    project/project/target
    project/target
    rocket/target
    target
    uncore/target
    zscale/target

# packages needed to build riscv-tools
addons:
  apt:
    sources:
      - ubuntu-toolchain-r-test
    packages:
      - gcc-4.8
      - g++-4.8
      - gperf
      - autoconf
      - automake
      - autotools-dev
      - libmpc-dev
      - libmpfr-dev
      - libgmp-dev
      - gawk
      - build-essential
      - bison
      - flex
      - texinfo

env:
  matrix:
    - CONFIG=DefaultConfig
    - CONFIG=DefaultL2Config
    - CONFIG=RoccExampleConfig
    - CONFIG=DualCoreConfig
    - CONFIG=MemtestConfig
    - CONFIG=FancyMemtestConfig
    - CONFIG=BroadcastRegressionTestConfig
    - CONFIG=CacheRegressionTestConfig
    - CONFIG=NastiConverterTestConfig
    - CONFIG=UnitTestConfig
    - CONFIG=SplitL2MetadataTestConfig

# blacklist private branches
branches:
  except:
    - hwacha
    - boom
    - hurricane

before_install:
  - rm riscv-tools/.travis.yml
  - export CXX=g++-4.8 CC=gcc-4.8

script:
  - make vsim-verilog -C regression CONFIG=$CONFIG TORTURE_CONFIG=default CHISEL_VERSION=3
  - make fsim-verilog -C regression CONFIG=$CONFIG TORTURE_CONFIG=default
  - make emulator-ndebug -C regression CONFIG=$CONFIG TORTURE_CONFIG=default
  - make emulator-asm-tests   -C regression CONFIG=$CONFIG TORTURE_CONFIG=default
  - make emulator-bmark-tests -C regression CONFIG=$CONFIG TORTURE_CONFIG=default -j1

before_cache:
  - ls -tr regression/install | tail -n+2 | sed s@^@regression/install/@ | xargs rm -rf
add travis support and tests 2015-08-25 22:29:20 +02:00			`language: scala`
			`# run on new infrastructure`
			`sudo: false`
Enable travis caching 2016-02-23 02:41:01 +01:00			`cache:`
			`apt: true`
			`directories:`
			`$HOME/.ivy2`
			`regression/install`
Cache all the Scala build directories I hope this will result in Travis building our stuff a lot faster, since this currently takes about half the time. 2016-02-24 01:47:48 +01:00			`chisel/target`
			`context-dependent-environments/target`
			`groundtest/target`
			`hardfloat/target`
			`junctions/target`
			`project/project/target`
			`project/target`
			`rocket/target`
			`target`
			`uncore/target`
			`zscale/target`
format .travis.yml (trigger rebuilt to test cache) 2016-02-23 17:44:15 +01:00
add travis support and tests 2015-08-25 22:29:20 +02:00			`# packages needed to build riscv-tools`
			`addons:`
			`apt:`
			`sources:`
			`- ubuntu-toolchain-r-test`
			`packages:`
			`- gcc-4.8`
			`- g++-4.8`
			`- gperf`
			`- autoconf`
			`- automake`
			`- autotools-dev`
			`- libmpc-dev`
			`- libmpfr-dev`
			`- libgmp-dev`
			`- gawk`
			`- build-essential`
			`- bison`
			`- flex`
			`- texinfo`

			`env:`
[travis] add multiple configs including rocc 2015-11-28 16:17:49 +01:00			`matrix:`
some additions to Travis and fixes for Testing 2016-02-24 01:56:13 +01:00			`- CONFIG=DefaultConfig`
add DefaultL2Config and DualCoreConfig to travis 2016-03-28 22:25:44 +02:00			`- CONFIG=DefaultL2Config`
Move travis to the regression Makefile We want to add support for caching riscv-tools builds on Travis and the easiest way to do so looks like to jus go ahead and use 2016-02-23 02:29:07 +01:00			`- CONFIG=RoccExampleConfig`
add DefaultL2Config and DualCoreConfig to travis 2016-03-28 22:25:44 +02:00			`- CONFIG=DualCoreConfig`
Move travis to the regression Makefile We want to add support for caching riscv-tools builds on Travis and the easiest way to do so looks like to jus go ahead and use 2016-02-23 02:29:07 +01:00			`- CONFIG=MemtestConfig`
add more complicated memtests to travis 2016-04-01 03:42:14 +02:00			`- CONFIG=FancyMemtestConfig`
Move travis to the regression Makefile We want to add support for caching riscv-tools builds on Travis and the easiest way to do so looks like to jus go ahead and use 2016-02-23 02:29:07 +01:00			`- CONFIG=BroadcastRegressionTestConfig`
			`- CONFIG=CacheRegressionTestConfig`
Fix narrow read/write behavior for AXI converters and fix L2 bugs Until recently, we were assuming that the data channel in AXI was always right-justified. However, for narrow writes, the data must actually be aligned within the byte lanes. This commit changes some of the converters in order to fix this issue. There was a bug in the L2 cache in which a merged get request was causing the tracker to read the old data from the data array, overwriting the updated data acquired from outer memory. Changed it so that pending_reads is no longer set if the data in the buffer is already valid. There was a bug in the PortedTileLinkCrossbar. The new GrantFromSrc and FinishToDst types used client_id for routing to managers. This caused bits to get cut off, which meant the Finish messages could not be routed correctly. Changed to use manager_id instead. 2016-04-02 02:53:59 +02:00			`- CONFIG=NastiConverterTestConfig`
some additions to Travis and fixes for Testing 2016-02-24 01:56:13 +01:00			`- CONFIG=UnitTestConfig`
Add support for per-way cache metadata Adds a new cache parameter (SplitMetadata) and an associated knob. Closes #62 2016-02-29 23:49:18 +01:00			`- CONFIG=SplitL2MetadataTestConfig`
add travis support and tests 2015-08-25 22:29:20 +02:00
blacklist private branches from travis 2015-09-09 00:13:38 +02:00			`# blacklist private branches`
			`branches:`
			`except:`
			`- hwacha`
			`- boom`
			`- hurricane`

add travis support and tests 2015-08-25 22:29:20 +02:00			`before_install:`
			`- rm riscv-tools/.travis.yml`
			`- export CXX=g++-4.8 CC=gcc-4.8`

			`script:`
Revert "switch back to Chisel2 for verilog build for now" This reverts commit 3673365b0811c3e1f3456902c3bc9c7639a0ba9d. 2016-03-31 04:00:38 +02:00			`- make vsim-verilog -C regression CONFIG=$CONFIG TORTURE_CONFIG=default CHISEL_VERSION=3`
Move travis to the regression Makefile We want to add support for caching riscv-tools builds on Travis and the easiest way to do so looks like to jus go ahead and use 2016-02-23 02:29:07 +01:00			`- make fsim-verilog -C regression CONFIG=$CONFIG TORTURE_CONFIG=default`
			`- make emulator-ndebug -C regression CONFIG=$CONFIG TORTURE_CONFIG=default`
			`- make emulator-asm-tests -C regression CONFIG=$CONFIG TORTURE_CONFIG=default`
			`- make emulator-bmark-tests -C regression CONFIG=$CONFIG TORTURE_CONFIG=default -j1`

			`before_cache:`
			`- ls -tr regression/install \| tail -n+2 \| sed s@^@regression/install/@ \| xargs rm -rf`