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2 Commits
ec4e3ec36d
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boot-test
Author | SHA1 | Date | |
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5ed6fb3d37 | |||
10c26c0f7b |
@ -8,7 +8,7 @@
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.globl _prog_start
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_prog_start:
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smp_pause(s1, s2)
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li sp, (PAYLOAD_DEST + 0x7fff000)
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li sp, (PAYLOAD_DEST + 0xffff000)
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call main
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smp_resume(s1, s2)
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csrr a0, mhartid
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@ -20,7 +20,8 @@ static volatile uint32_t * const uart = (void *)(UART_CTRL_ADDR);
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static inline void kputc(char c)
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{
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volatile uint32_t *tx = ®32(uart, UART_REG_TXFIFO);
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//volatile uint32_t *tx = ®32(uart, UART_REG_TXFIFO);
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volatile uint32_t *tx = (void *) 0x64003000; // Terminal (32 bit)
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#ifdef __riscv_atomic
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int32_t r;
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do {
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@ -12,7 +12,7 @@
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#define PAYLOAD_SIZE (16 << 11)
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#define F_CLK 50000000UL
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#define F_CLK 60000000UL
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static volatile uint32_t * const spi = (void *)(SPI_CTRL_ADDR);
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@ -160,7 +160,8 @@ static int copy(void)
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int rc = 0;
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dputs("CMD18");
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kprintf("LOADING ");
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//~ kprintf("LOADING ");
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kprintf("READ: ");
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REG32(spi, SPI_REG_SCKDIV) = (F_CLK / 20000000UL);
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if (sd_cmd(0x52, 0, 0xE1) != 0x00) {
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@ -172,14 +173,18 @@ static int copy(void)
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long n;
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crc = 0;
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n = 512;
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//~ n = 512;
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n = 50;
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while (sd_dummy() != 0xFE);
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do {
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uint8_t x = sd_dummy();
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*p++ = x;
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crc = crc16_round(crc, x);
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kputc(x);
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//~ *p++ = x;
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//~ crc = crc16_round(crc, x);
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} while (--n > 0);
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return 0;
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crc_exp = ((uint16_t)sd_dummy() << 8);
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crc_exp |= sd_dummy();
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@ -202,10 +207,60 @@ static int copy(void)
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return rc;
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}
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// leave room for 2 MiB stack (SP = 8FFFF000)
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#define RAMTEST_START (uint32_t*)(0x80000000)
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#define RAMTEST_END (uint32_t*)(0x8FDFF000)
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int main(void)
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{
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REG32(uart, UART_REG_TXCTRL) = UART_TXEN;
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//REG32(uart, UART_REG_TXCTRL) = UART_TXEN;
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//GPIO_REG(GPIO_INPUT_EN) = 0xFF;
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GPIO_REG(GPIO_OUTPUT_EN) = 0xFF;
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GPIO_REG(GPIO_OUTPUT_VAL) = 0xFF;
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kprintf("\nFilling RAM from %lx to %lx...\n", RAMTEST_START, RAMTEST_END);
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uint32_t counter = 0;
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for(uint32_t* ram = RAMTEST_START; ram < RAMTEST_END; ++ram) {
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*ram = counter++;
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}
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kprintf("\rChecking RAM...\n");
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counter = 0;
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uint32_t correct = 0;
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uint32_t wrong = 0;
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for(uint32_t* ram = RAMTEST_START; ram < RAMTEST_END; ++ram) {
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if(*ram != counter) {
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kprintf("\rMismatch at %lx: read %x, expected %x\n", ram, *ram, counter);
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++wrong;
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} else {
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++correct;
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}
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++counter;
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}
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kprintf("\rSummary: %x matches, %x mismatches.\n", correct, wrong);
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kprintf("\nTrying to read from SD card...\n");
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kputs("POWERON");
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sd_poweron();
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kprintf("sd_cmd0: %hx\n", sd_cmd0());
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kprintf("sd_cmd8: %hx\n", sd_cmd8());
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kprintf("sd_acmd41: %hx\n", sd_acmd41());
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kprintf("sd_cmd58: %hx\n", sd_cmd58());
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kprintf("sd_cmd16: %hx\n", sd_cmd16());
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kprintf("\ncopy: %hx\n", copy());
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while(1) {
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//uint8_t dip_value = GPIO_REG(GPIO_INPUT_VAL) & 0b01111111;
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//kprintf("dip value: %hx, ram value: %c\n", dip_value, ram[dip_value]);
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GPIO_REG(GPIO_OUTPUT_VAL) ^= 0xFF;
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}
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return 0;
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/*
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kputs("INIT");
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sd_poweron();
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if (sd_cmd0() ||
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@ -221,5 +276,5 @@ int main(void)
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kputs("BOOT");
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__asm__ __volatile__ ("fence.i" : : : "memory");
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return 0;
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return 0;*/
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}
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Submodule rocket-chip updated: 81d631a6a1...6df42fc360
@ -21,7 +21,7 @@ class FreedomUML507Config extends Config(
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new WithoutTLMonitors ++
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new WithJtagDTM ++
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new WithNMemoryChannels(1) ++
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new WithNSmallLinuxCores(1) ++
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new WithNBigCores(1) ++
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new BaseConfig
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)
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