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base: riscv:4f950772a1016dda4475d19851724edfa4f17666
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riscv:ml507
riscv:boot-test
riscv:master
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compare: riscv:e57dfd0f6300a2fcd6febe546c3e6d655a51ba08
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riscv:ml507
riscv:boot-test
riscv:master

2 Commits
4f950772a1 ... e57dfd0f63

Author SHA1 Message Date
Klemens Schölhorn
e57dfd0f63 Update rocket-chip to fix rom generation 2018-05-01 00:11:11 +02:00
Klemens Schölhorn
df44d1a3bc Make DIP switches available as GPIO register 2018-05-01 00:09:14 +02:00
3 changed files with 5 additions and 4 deletions
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2
fpga-shells

@ -1 +1 @@
Subproject commit 5bcc4e82fdc65bcd25c92e4f11a9c8421bacdea8 Subproject commit 79b53cf2ae2478f20ef9716ed0b63444ee7e48d3

2
rocket-chip

@ -1 +1 @@
Subproject commit 4ba8acb4aa26901899963136704d065a22e36460 Subproject commit 6df42fc36078d6ff60c1610b6fb89b24d668f134

5
src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala
View File

@ -55,9 +55,10 @@ class U500ML507DevKitFPGAChip(implicit override val p: Parameters)
GPIOPinsFromPort(gpio_pins, dut.gpio(0)) GPIOPinsFromPort(gpio_pins, dut.gpio(0))
gpio_pins.pins.foreach { _.i.ival := Bool(false) }
gpio_pins.pins.zipWithIndex.foreach { gpio_pins.pins.zipWithIndex.foreach {
case(pin, idx) => led(idx) := pin.o.oval case(pin, idx) =>
pin.i.ival := dip(idx)
led(idx) := pin.o.oval
} }
} }