riscv/freedom
1
0
Fork 0
Code Issues Releases Activity

platforms: fixup to new package names

Browse Source
This commit is contained in:
Wesley W. Terpstra 2018-03-05 15:45:01 -08:00
parent 6c9b159659
commit 1445a381a1
5 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/main/scala/everywhere/e300artydevkit/Config.scala
View File

@ -2,7 +2,7 @@
package sifive.freedom.everywhere.e300artydevkit package sifive.freedom.everywhere.e300artydevkit
import freechips.rocketchip.config._ import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._ import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy.{DTSModel, DTSTimebase} import freechips.rocketchip.diplomacy.{DTSModel, DTSTimebase}

2
src/main/scala/everywhere/e300artydevkit/Platform.scala
View File

@ -4,7 +4,7 @@ package sifive.freedom.everywhere.e300artydevkit
import Chisel._ import Chisel._
import freechips.rocketchip.config._ import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._ import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._ import freechips.rocketchip.diplomacy._

6
src/main/scala/everywhere/e300artydevkit/System.scala
View File

@ -4,7 +4,7 @@ package sifive.freedom.everywhere.e300artydevkit
import Chisel._ import Chisel._
import freechips.rocketchip.config._ import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._ import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._ import freechips.rocketchip.diplomacy._
@ -21,7 +21,7 @@ import sifive.blocks.devices.i2c._
// E300ArtyDevKitSystem // E300ArtyDevKitSystem
//------------------------------------------------------------------------- //-------------------------------------------------------------------------
class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketCoreplex class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketSubsystem
with HasPeripheryMaskROMSlave with HasPeripheryMaskROMSlave
with HasPeripheryDebug with HasPeripheryDebug
with HasPeripheryMockAON with HasPeripheryMockAON
@ -35,7 +35,7 @@ class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketCoreplex
} }
class E300ArtyDevKitSystemModule[+L <: E300ArtyDevKitSystem](_outer: L) class E300ArtyDevKitSystemModule[+L <: E300ArtyDevKitSystem](_outer: L)
extends RocketCoreplexModule(_outer) extends RocketSubsystemModuleImp(_outer)
with HasPeripheryDebugModuleImp with HasPeripheryDebugModuleImp
with HasPeripheryUARTModuleImp with HasPeripheryUARTModuleImp
with HasPeripherySPIModuleImp with HasPeripherySPIModuleImp

2
src/main/scala/unleashed/u500vc707devkit/Config.scala
View File

@ -2,7 +2,7 @@
package sifive.freedom.unleashed.u500vc707devkit package sifive.freedom.unleashed.u500vc707devkit
import freechips.rocketchip.config._ import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._ import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._ import freechips.rocketchip.diplomacy._

6
src/main/scala/unleashed/u500vc707devkit/System.scala
View File

@ -4,7 +4,7 @@ package sifive.freedom.unleashed.u500vc707devkit
import Chisel._ import Chisel._
import freechips.rocketchip.config._ import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._ import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._ import freechips.rocketchip.diplomacy._
@ -21,7 +21,7 @@ import sifive.fpgashells.devices.xilinx.xilinxvc707pciex1._
// U500VC707DevKitSystem // U500VC707DevKitSystem
//------------------------------------------------------------------------- //-------------------------------------------------------------------------
class U500VC707DevKitSystem(implicit p: Parameters) extends RocketCoreplex class U500VC707DevKitSystem(implicit p: Parameters) extends RocketSubsystem
with HasPeripheryMaskROMSlave with HasPeripheryMaskROMSlave
with HasPeripheryDebug with HasPeripheryDebug
with HasSystemErrorSlave with HasSystemErrorSlave
@ -34,7 +34,7 @@ class U500VC707DevKitSystem(implicit p: Parameters) extends RocketCoreplex
} }
class U500VC707DevKitSystemModule[+L <: U500VC707DevKitSystem](_outer: L) class U500VC707DevKitSystemModule[+L <: U500VC707DevKitSystem](_outer: L)
extends RocketCoreplexModule(_outer) extends RocketSubsystemModuleImp(_outer)
with HasRTCModuleImp with HasRTCModuleImp
with HasPeripheryDebugModuleImp with HasPeripheryDebugModuleImp
with HasPeripheryUARTModuleImp with HasPeripheryUARTModuleImp