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platforms: fixup to new package names

This commit is contained in:
Wesley W. Terpstra 2018-03-05 15:45:01 -08:00
parent 6c9b159659
commit 1445a381a1
5 changed files with 9 additions and 9 deletions
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2
src/main/scala/everywhere/e300artydevkit/Config.scala
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@ -2,7 +2,7 @@
package sifive.freedom.everywhere.e300artydevkit
import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._
import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy.{DTSModel, DTSTimebase}

2
src/main/scala/everywhere/e300artydevkit/Platform.scala
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@ -4,7 +4,7 @@ package sifive.freedom.everywhere.e300artydevkit
import Chisel._
import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._
import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._

6
src/main/scala/everywhere/e300artydevkit/System.scala
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@ -4,7 +4,7 @@ package sifive.freedom.everywhere.e300artydevkit
import Chisel._
import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._
import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._
@ -21,7 +21,7 @@ import sifive.blocks.devices.i2c._
// E300ArtyDevKitSystem
//-------------------------------------------------------------------------
class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketCoreplex
class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketSubsystem
with HasPeripheryMaskROMSlave
with HasPeripheryDebug
with HasPeripheryMockAON
@ -35,7 +35,7 @@ class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketCoreplex
}
class E300ArtyDevKitSystemModule[+L <: E300ArtyDevKitSystem](_outer: L)
extends RocketCoreplexModule(_outer)
extends RocketSubsystemModuleImp(_outer)
with HasPeripheryDebugModuleImp
with HasPeripheryUARTModuleImp
with HasPeripherySPIModuleImp

2
src/main/scala/unleashed/u500vc707devkit/Config.scala
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@ -2,7 +2,7 @@
package sifive.freedom.unleashed.u500vc707devkit
import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._
import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._

6
src/main/scala/unleashed/u500vc707devkit/System.scala
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@ -4,7 +4,7 @@ package sifive.freedom.unleashed.u500vc707devkit
import Chisel._
import freechips.rocketchip.config._
import freechips.rocketchip.coreplex._
import freechips.rocketchip.subsystem._
import freechips.rocketchip.devices.debug._
import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.diplomacy._
@ -21,7 +21,7 @@ import sifive.fpgashells.devices.xilinx.xilinxvc707pciex1._
// U500VC707DevKitSystem
//-------------------------------------------------------------------------
class U500VC707DevKitSystem(implicit p: Parameters) extends RocketCoreplex
class U500VC707DevKitSystem(implicit p: Parameters) extends RocketSubsystem
with HasPeripheryMaskROMSlave
with HasPeripheryDebug
with HasSystemErrorSlave
@ -34,7 +34,7 @@ class U500VC707DevKitSystem(implicit p: Parameters) extends RocketCoreplex
}
class U500VC707DevKitSystemModule[+L <: U500VC707DevKitSystem](_outer: L)
extends RocketCoreplexModule(_outer)
extends RocketSubsystemModuleImp(_outer)
with HasRTCModuleImp
with HasPeripheryDebugModuleImp
with HasPeripheryUARTModuleImp