Remove vc707 memory interface from ml507

This commit is contained in:
Klemens Schölhorn 2018-04-11 20:55:00 +02:00
parent 5fdadd244c
commit 0134a8f4dc
2 changed files with 2 additions and 9 deletions

View File

@ -29,7 +29,6 @@ object PinGen {
class U500ML507DevKitFPGAChip(implicit override val p: Parameters) class U500ML507DevKitFPGAChip(implicit override val p: Parameters)
extends VC707Shell extends VC707Shell
with HasDDR3
with HasDebugJTAG { with HasDebugJTAG {
//----------------------------------------------------------------------- //-----------------------------------------------------------------------
@ -48,7 +47,6 @@ class U500ML507DevKitFPGAChip(implicit override val p: Parameters)
connectDebugJTAG(dut) connectDebugJTAG(dut)
connectSPI (dut) connectSPI (dut)
connectUART (dut) connectUART (dut)
connectMIG (dut)
//--------------------------------------------------------------------- //---------------------------------------------------------------------
// GPIO // GPIO

View File

@ -14,9 +14,6 @@ import sifive.blocks.devices.gpio._
import sifive.blocks.devices.spi._ import sifive.blocks.devices.spi._
import sifive.blocks.devices.uart._ import sifive.blocks.devices.uart._
import sifive.fpgashells.devices.xilinx.xilinxvc707mig._
import sifive.fpgashells.devices.xilinx.xilinxvc707pciex1._
//------------------------------------------------------------------------- //-------------------------------------------------------------------------
// U500ML507DevKitSystem // U500ML507DevKitSystem
//------------------------------------------------------------------------- //-------------------------------------------------------------------------
@ -27,8 +24,7 @@ class U500ML507DevKitSystem(implicit p: Parameters) extends RocketSubsystem
with HasSystemErrorSlave with HasSystemErrorSlave
with HasPeripheryUART with HasPeripheryUART
with HasPeripherySPI with HasPeripherySPI
with HasPeripheryGPIO with HasPeripheryGPIO {
with HasMemoryXilinxVC707MIG {
override lazy val module = new U500ML507DevKitSystemModule(this) override lazy val module = new U500ML507DevKitSystemModule(this)
} }
@ -38,8 +34,7 @@ class U500ML507DevKitSystemModule[+L <: U500ML507DevKitSystem](_outer: L)
with HasPeripheryDebugModuleImp with HasPeripheryDebugModuleImp
with HasPeripheryUARTModuleImp with HasPeripheryUARTModuleImp
with HasPeripherySPIModuleImp with HasPeripherySPIModuleImp
with HasPeripheryGPIOModuleImp with HasPeripheryGPIOModuleImp {
with HasMemoryXilinxVC707MIGModuleImp {
// Reset vector is set to the location of the mask rom // Reset vector is set to the location of the mask rom
val maskROMParams = p(PeripheryMaskROMKey) val maskROMParams = p(PeripheryMaskROMKey)
global_reset_vector := maskROMParams(0).address.U global_reset_vector := maskROMParams(0).address.U