120 lines
3.3 KiB
Tcl
120 lines
3.3 KiB
Tcl
# See LICENSE for license details.
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# Process command line arguments
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# http://wiki.tcl.tk/1730
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set ip_vivado_tcls {}
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while {[llength $argv]} {
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set argv [lassign $argv[set argv {}] flag]
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switch -glob $flag {
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-top-module {
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set argv [lassign $argv[set argv {}] top]
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}
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-F {
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# This should be a simple file format with one filepath per line
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set argv [lassign $argv[set argv {}] vsrc_manifest]
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}
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-board {
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set argv [lassign $argv[set argv {}] board]
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}
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-ip-vivado-tcls {
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set argv [lassign $argv[set argv {}] ip_vivado_tcls]
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}
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-pre-impl-debug-tcl {
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set argv [lassign $argv[set argv {}] pre_impl_debug_tcl]
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}
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-post-impl-debug-tcl {
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set argv [lassign $argv[set argv {}] post_impl_debug_tcl]
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}
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default {
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return -code error [list {unknown option} $flag]
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}
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}
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}
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if {![info exists top]} {
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return -code error [list {--top-module option is required}]
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}
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if {![info exists vsrc_manifest]} {
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return -code error [list {-F option is required}]
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}
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if {![info exists board]} {
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return -code error [list {--board option is required}]
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}
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# Set the variable for all the common files
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set commondir [file dirname $scriptdir]
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# Set the variable that points to board specific files
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set boarddir [file join [file dirname $commondir] $board]
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source [file join $boarddir tcl board.tcl]
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# Set the variable that points to board constraint files
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set constraintsdir [file join $boarddir constraints]
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# Set the variable that points to common verilog sources
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set srcdir [file join $commondir vsrc]
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# Creates a work directory
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set wrkdir [file join [pwd] obj]
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# Create the directory for IPs
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set ipdir [file join $wrkdir ip]
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# Create an in-memory project
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create_project -part $part_fpga -in_memory
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# Set the board part, target language, default library, and IP directory
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# paths for the current project
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set_property -dict [list \
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BOARD_PART $part_board \
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TARGET_LANGUAGE {Verilog} \
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DEFAULT_LIB {xil_defaultlib} \
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IP_REPO_PATHS $ipdir \
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] [current_project]
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if {[get_filesets -quiet sources_1] eq ""} {
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create_fileset -srcset sources_1
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}
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set obj [current_fileset]
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# Add verilog files from manifest
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proc load_vsrc_manifest {obj vsrc_manifest} {
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set fp [open $vsrc_manifest r]
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set files [lsearch -not -exact -all -inline [split [read $fp] "\n"] {}]
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set relative_files {}
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foreach path $files {
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if {[string match {/*} $path]} {
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lappend relative_files $path
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} elseif {![string match {#*} $path]} {
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lappend relative_files [file join [file dirname $vsrc_manifest] $path]
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}
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}
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add_files -norecurse -fileset $obj {*}$relative_files
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close $fp
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}
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load_vsrc_manifest $obj $vsrc_manifest
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# Add IP Vivado TCL
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if {$ip_vivado_tcls ne {}} {
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# Split string into words even with multiple consecutive spaces
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# http://wiki.tcl.tk/989
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set ip_vivado_tcls [regexp -inline -all -- {\S+} $ip_vivado_tcls]
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}
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if {[get_filesets -quiet sim_1] eq ""} {
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create_fileset -simset sim_1
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}
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set obj [current_fileset -simset]
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if {[get_filesets -quiet constrs_1] eq ""} {
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create_fileset -constrset constrs_1
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}
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set obj [current_fileset -constrset]
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add_files -quiet -norecurse -fileset $obj [glob -directory $constraintsdir -nocomplain {*.xdc}]
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add_files -quiet -norecurse -fileset $obj [glob -directory $constraintsdir -nocomplain {*.tcl}]
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