computer/boards/pc/pc.kicad_pcb

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(kicad_pcb (version 4) (host pcbnew 4.0.7)
(general
(links 45)
(no_connects 0)
(area 134.952381 70.355 162.22762 115.165)
(thickness 1.6)
(drawings 0)
(tracks 284)
(zones 0)
(modules 7)
(nets 34)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x00000_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 4)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 /Clock)
(net 2 GND)
(net 3 VCC)
(net 4 "Net-(J2-Pad1)")
(net 5 "Net-(J2-Pad2)")
(net 6 "Net-(J2-Pad3)")
(net 7 "Net-(J2-Pad4)")
(net 8 "Net-(J2-Pad5)")
(net 9 "Net-(J2-Pad6)")
(net 10 "Net-(J2-Pad7)")
(net 11 "Net-(J2-Pad8)")
(net 12 "Net-(J2-Pad9)")
(net 13 "Net-(J2-Pad10)")
(net 14 "Net-(J2-Pad11)")
(net 15 "Net-(J2-Pad12)")
(net 16 /Count)
(net 17 /PE)
(net 18 "Net-(J4-Pad1)")
(net 19 "Net-(J4-Pad2)")
(net 20 "Net-(J4-Pad3)")
(net 21 "Net-(J4-Pad4)")
(net 22 "Net-(J4-Pad5)")
(net 23 "Net-(J4-Pad6)")
(net 24 "Net-(J4-Pad7)")
(net 25 "Net-(J4-Pad8)")
(net 26 "Net-(J4-Pad9)")
(net 27 "Net-(J4-Pad10)")
(net 28 "Net-(J4-Pad11)")
(net 29 "Net-(J4-Pad12)")
(net 30 /C0)
(net 31 /C1)
(net 32 "Net-(U3-Pad15)")
(net 33 "Net-(J1-Pad1)")
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net /C0)
(add_net /C1)
(add_net /Clock)
(add_net /Count)
(add_net /PE)
(add_net GND)
(add_net "Net-(J1-Pad1)")
(add_net "Net-(J2-Pad1)")
(add_net "Net-(J2-Pad10)")
(add_net "Net-(J2-Pad11)")
(add_net "Net-(J2-Pad12)")
(add_net "Net-(J2-Pad2)")
(add_net "Net-(J2-Pad3)")
(add_net "Net-(J2-Pad4)")
(add_net "Net-(J2-Pad5)")
(add_net "Net-(J2-Pad6)")
(add_net "Net-(J2-Pad7)")
(add_net "Net-(J2-Pad8)")
(add_net "Net-(J2-Pad9)")
(add_net "Net-(J4-Pad1)")
(add_net "Net-(J4-Pad10)")
(add_net "Net-(J4-Pad11)")
(add_net "Net-(J4-Pad12)")
(add_net "Net-(J4-Pad2)")
(add_net "Net-(J4-Pad3)")
(add_net "Net-(J4-Pad4)")
(add_net "Net-(J4-Pad5)")
(add_net "Net-(J4-Pad6)")
(add_net "Net-(J4-Pad7)")
(add_net "Net-(J4-Pad8)")
(add_net "Net-(J4-Pad9)")
(add_net "Net-(U3-Pad15)")
(add_net VCC)
)
(module Pin_Headers:Pin_Header_Straight_1x03_Pitch2.54mm (layer B.Cu) (tedit 59650532) (tstamp 5AA1AE0D)
(at 139.7 111.76)
(descr "Through hole straight pin header, 1x03, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x03 2.54mm single row")
(path /5AA191ED)
(fp_text reference J1 (at 0 2.33) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value Conn_01x03 (at 0 -7.41) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 1.27) (end 1.27 -6.35) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 -6.35) (end -1.27 -6.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 -6.35) (end -1.27 0.635) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1))
(fp_line (start -1.33 -6.41) (end 1.33 -6.41) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end -1.33 -6.41) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 -1.27) (end 1.33 -6.41) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.8 1.8) (end -1.8 -6.85) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -6.85) (end 1.8 -6.85) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 -6.85) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 -2.54 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 33 "Net-(J1-Pad1)"))
(pad 2 thru_hole oval (at 0 -2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 GND))
(pad 3 thru_hole oval (at 0 -5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 VCC))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x03_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Pin_Headers:Pin_Header_Straight_1x12_Pitch2.54mm (layer B.Cu) (tedit 59650532) (tstamp 5AA1AE1D)
(at 139.7 73.66 180)
(descr "Through hole straight pin header, 1x12, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x12 2.54mm single row")
(path /5AA16970)
(fp_text reference J2 (at 0 2.33 180) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value Conn_01x12 (at 0 -30.27 180) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 1.27) (end 1.27 -29.21) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 -29.21) (end -1.27 -29.21) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 -29.21) (end -1.27 0.635) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1))
(fp_line (start -1.33 -29.27) (end 1.33 -29.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end -1.33 -29.27) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 -1.27) (end 1.33 -29.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.8 1.8) (end -1.8 -29.75) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -29.75) (end 1.8 -29.75) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 -29.75) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 -13.97 450) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 "Net-(J2-Pad1)"))
(pad 2 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 5 "Net-(J2-Pad2)"))
(pad 3 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 6 "Net-(J2-Pad3)"))
(pad 4 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 "Net-(J2-Pad4)"))
(pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 "Net-(J2-Pad5)"))
(pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 9 "Net-(J2-Pad6)"))
(pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 10 "Net-(J2-Pad7)"))
(pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 11 "Net-(J2-Pad8)"))
(pad 9 thru_hole oval (at 0 -20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 12 "Net-(J2-Pad9)"))
(pad 10 thru_hole oval (at 0 -22.86 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 13 "Net-(J2-Pad10)"))
(pad 11 thru_hole oval (at 0 -25.4 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 14 "Net-(J2-Pad11)"))
(pad 12 thru_hole oval (at 0 -27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 15 "Net-(J2-Pad12)"))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x12_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Pin_Headers:Pin_Header_Straight_1x03_Pitch2.54mm (layer B.Cu) (tedit 59650532) (tstamp 5AA1AE24)
(at 157.48 111.76)
(descr "Through hole straight pin header, 1x03, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x03 2.54mm single row")
(path /5AA19165)
(fp_text reference J3 (at 0 2.33) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value Conn_01x03 (at 0 -7.41) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 1.27) (end 1.27 -6.35) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 -6.35) (end -1.27 -6.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 -6.35) (end -1.27 0.635) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1))
(fp_line (start -1.33 -6.41) (end 1.33 -6.41) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end -1.33 -6.41) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 -1.27) (end 1.33 -6.41) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.8 1.8) (end -1.8 -6.85) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -6.85) (end 1.8 -6.85) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 -6.85) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 -2.54 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 16 /Count))
(pad 2 thru_hole oval (at 0 -2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 17 /PE))
(pad 3 thru_hole oval (at 0 -5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 /Clock))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x03_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Pin_Headers:Pin_Header_Straight_1x12_Pitch2.54mm (layer B.Cu) (tedit 59650532) (tstamp 5AA1AE34)
(at 157.48 73.66 180)
(descr "Through hole straight pin header, 1x12, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x12 2.54mm single row")
(path /5AA169ED)
(fp_text reference J4 (at 0 2.33 180) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value Conn_01x12 (at 0 -30.27 180) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 1.27) (end 1.27 -29.21) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 -29.21) (end -1.27 -29.21) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 -29.21) (end -1.27 0.635) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1))
(fp_line (start -1.33 -29.27) (end 1.33 -29.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end -1.33 -29.27) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 -1.27) (end 1.33 -29.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.8 1.8) (end -1.8 -29.75) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -29.75) (end 1.8 -29.75) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 -29.75) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 -13.97 450) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 18 "Net-(J4-Pad1)"))
(pad 2 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 19 "Net-(J4-Pad2)"))
(pad 3 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 20 "Net-(J4-Pad3)"))
(pad 4 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 21 "Net-(J4-Pad4)"))
(pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 22 "Net-(J4-Pad5)"))
(pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 23 "Net-(J4-Pad6)"))
(pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 24 "Net-(J4-Pad7)"))
(pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 "Net-(J4-Pad8)"))
(pad 9 thru_hole oval (at 0 -20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 26 "Net-(J4-Pad9)"))
(pad 10 thru_hole oval (at 0 -22.86 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 "Net-(J4-Pad10)"))
(pad 11 thru_hole oval (at 0 -25.4 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 "Net-(J4-Pad11)"))
(pad 12 thru_hole oval (at 0 -27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 "Net-(J4-Pad12)"))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x12_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm (layer F.Cu) (tedit 58CC8F64) (tstamp 5AA1AE48)
(at 148.43 80.645)
(descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SOIC 1.27")
(path /5AA16657)
(attr smd)
(fp_text reference U1 (at 0 -6) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 74LS161 (at 0 6) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.9 0.9) (thickness 0.135)))
)
(fp_line (start -0.95 -4.95) (end 1.95 -4.95) (layer F.Fab) (width 0.15))
(fp_line (start 1.95 -4.95) (end 1.95 4.95) (layer F.Fab) (width 0.15))
(fp_line (start 1.95 4.95) (end -1.95 4.95) (layer F.Fab) (width 0.15))
(fp_line (start -1.95 4.95) (end -1.95 -3.95) (layer F.Fab) (width 0.15))
(fp_line (start -1.95 -3.95) (end -0.95 -4.95) (layer F.Fab) (width 0.15))
(fp_line (start -3.7 -5.25) (end -3.7 5.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.25) (end 3.7 5.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.25) (end 3.7 -5.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 5.25) (end 3.7 5.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.075 -5.075) (end -2.075 -5.05) (layer F.SilkS) (width 0.15))
(fp_line (start 2.075 -5.075) (end 2.075 -4.97) (layer F.SilkS) (width 0.15))
(fp_line (start 2.075 5.075) (end 2.075 4.97) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 5.075) (end -2.075 4.97) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 -5.075) (end 2.075 -5.075) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 5.075) (end 2.075 5.075) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 -5.05) (end -3.45 -5.05) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -2.7 -4.445) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 VCC))
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(model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl
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(module Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm (layer F.Cu) (tedit 58CC8F64) (tstamp 5AA1AE5C)
(at 148.59 92.71)
(descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SOIC 1.27")
(path /5AA166E3)
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(at 148.43 105.004)
(descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SOIC 1.27")
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