Add pattern generator for demoing the scrolling behaviour
This commit is contained in:
parent
1c22e73128
commit
e960fae673
45
main.vhd
45
main.vhd
@ -35,6 +35,9 @@ architecture syn of main is
|
|||||||
signal clk_vga: std_logic;
|
signal clk_vga: std_logic;
|
||||||
|
|
||||||
signal reset: std_logic;
|
signal reset: std_logic;
|
||||||
|
|
||||||
|
signal write_enable: std_logic;
|
||||||
|
signal write_data: std_logic_vector(7 downto 0);
|
||||||
begin
|
begin
|
||||||
|
|
||||||
reset <= switch_center;
|
reset <= switch_center;
|
||||||
@ -48,10 +51,8 @@ begin
|
|||||||
terminal: entity work.terminal port map (
|
terminal: entity work.terminal port map (
|
||||||
clk => clk_vga,
|
clk => clk_vga,
|
||||||
reset => reset,
|
reset => reset,
|
||||||
|
write_enable => write_enable,
|
||||||
write_enable => '0',
|
write_data => write_data,
|
||||||
write_data => x"00",
|
|
||||||
|
|
||||||
dvi_d => dvi_d,
|
dvi_d => dvi_d,
|
||||||
dvi_clk_p => dvi_clk_p,
|
dvi_clk_p => dvi_clk_p,
|
||||||
dvi_clk_n => dvi_clk_n,
|
dvi_clk_n => dvi_clk_n,
|
||||||
@ -63,6 +64,42 @@ begin
|
|||||||
i2c_sda => i2c_sda
|
i2c_sda => i2c_sda
|
||||||
);
|
);
|
||||||
|
|
||||||
|
-- write an example text pattern to test the terminal
|
||||||
|
process(clk_vga, reset)
|
||||||
|
variable delay: integer range 0 to 300_000;
|
||||||
|
variable line: integer range 0 to 90;
|
||||||
|
variable max: integer range 0 to 90;
|
||||||
|
begin
|
||||||
|
if reset = '1' then
|
||||||
|
delay := 0;
|
||||||
|
line := 0;
|
||||||
|
max := 0;
|
||||||
|
elsif rising_edge(clk_vga) then
|
||||||
|
write_enable <= '0';
|
||||||
|
|
||||||
|
if delay = 300_000 then
|
||||||
|
write_enable <= '1';
|
||||||
|
write_data <= "0" & std_logic_vector(to_unsigned(33 + line, 7));
|
||||||
|
|
||||||
|
if line = max then
|
||||||
|
write_data <= x"0a";
|
||||||
|
line := 0;
|
||||||
|
if max = 90 then
|
||||||
|
max := 0;
|
||||||
|
else
|
||||||
|
max := max + 1;
|
||||||
|
end if;
|
||||||
|
else
|
||||||
|
line := line + 1;
|
||||||
|
end if;
|
||||||
|
|
||||||
|
delay := 0;
|
||||||
|
else
|
||||||
|
delay := delay + 1;
|
||||||
|
end if;
|
||||||
|
end if;
|
||||||
|
end process;
|
||||||
|
|
||||||
keyboard_i: entity work.keyboard generic map (
|
keyboard_i: entity work.keyboard generic map (
|
||||||
input_clk => clk_vga_f
|
input_clk => clk_vga_f
|
||||||
) port map (
|
) port map (
|
||||||
|
Loading…
Reference in New Issue
Block a user