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riscv/sifive-blocks
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d973c659eb239d8bb1447ffe9a73df20cdd7bf04
sifive-blocks/src/main/scala/devices
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Wesley W. TerpstraandGitHub d973c659eb uart: make it easy to simulate large text printouts (#33)
2017-08-10 16:32:48 -07:00
..
gpio
allow bundle content params to be specified via a def (#29)
2017-08-02 11:46:27 -07:00
i2c
Ports: Rename the 'fromXYZPort' to 'fromPort' since it's redundant
2017-07-25 08:36:28 -07:00
jtag
Ports: Rename the 'fromXYZPort' to 'fromPort' since it's redundant
2017-07-25 08:36:28 -07:00
mockaon
mockaon: Adds logic to detect external rtc toggles
2017-08-02 18:11:05 -07:00
pinctrl
Remove pluralization on interface names. Require clocks and resets explicitly when necessary
2017-07-19 14:51:50 -07:00
pwm
allow bundle content params to be specified via a def (#29)
2017-08-02 11:46:27 -07:00
spi
spi: Fix invalid D channel response when flash interface is disabled
2017-08-02 13:50:00 -07:00
uart
uart: make it easy to simulate large text printouts (#33)
2017-08-10 16:32:48 -07:00
xilinxvc707mig
periphery: peripherals now in coreplex (#26)
2017-07-23 08:31:44 -07:00
xilinxvc707pciex1
periphery: peripherals now in coreplex (#26)
2017-07-23 08:31:44 -07:00
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