riscv/sifive-blocks
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spi: remove removed sink arg

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This commit is contained in:
Wesley W. Terpstra 2017-07-26 16:02:44 -07:00
parent 86010395ad
commit fced2323bd
1 changed files with 1 additions and 1 deletions
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src/main/scala/devices/spi/TLSPIFlash.scala
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@ -66,7 +66,7 @@ class SPIFlashTopModule[B <: SPIFlashTopBundle]
flash.io.addr.valid := f.a.valid flash.io.addr.valid := f.a.valid
f.a.ready := flash.io.addr.ready f.a.ready := flash.io.addr.ready
f.d.bits := outer.fnode.edgesIn.head.AccessAck(a, UInt(0), flash.io.data.bits) f.d.bits := outer.fnode.edgesIn.head.AccessAck(a, flash.io.data.bits)
f.d.valid := flash.io.data.valid f.d.valid := flash.io.data.valid
flash.io.data.ready := f.d.ready flash.io.data.ready := f.d.ready