devices: create periphery keys for all devices
Standardize how they are connected to the periphery bus
This commit is contained in:
committed by
Henry Cook
parent
03be9aba67
commit
baccd5ada2
@ -2,19 +2,12 @@
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package sifive.blocks.devices.gpio
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import Chisel._
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import config._
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import config.Parameters
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import regmapper._
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import uncore.tilelink2._
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import rocketchip.PeripheryBusConfig
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import util.AsyncResetRegVec
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case class GPIOConfig(address: BigInt, width: Int)
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trait HasGPIOParameters {
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implicit val p: Parameters
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val params: GPIOConfig
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val c = params
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}
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case class GPIOParams(address: BigInt, width: Int)
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// YAGNI: Make the PUE, DS, and
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// these also optionally HW controllable.
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@ -100,7 +93,7 @@ class GPIOPin extends Bundle {
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// level, and we have to do the pinmux
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// outside of RocketChipTop.
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class GPIOPortIO(c: GPIOConfig) extends Bundle {
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class GPIOPortIO(c: GPIOParams) extends Bundle {
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val pins = Vec(c.width, new GPIOPin)
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val iof_0 = Vec(c.width, new GPIOPinIOF).flip
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val iof_1 = Vec(c.width, new GPIOPinIOF).flip
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@ -108,12 +101,15 @@ class GPIOPortIO(c: GPIOConfig) extends Bundle {
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// It would be better if the IOF were here and
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// we could do the pinmux inside.
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trait GPIOBundle extends Bundle with HasGPIOParameters {
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val port = new GPIOPortIO(c)
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trait HasGPIOBundleContents extends Bundle {
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val params: GPIOParams
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val port = new GPIOPortIO(params)
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}
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trait GPIOModule extends Module with HasGPIOParameters with HasRegMap {
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val io: GPIOBundle
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trait HasGPIOModuleContents extends Module with HasRegMap {
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val io: HasGPIOBundleContents
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val params: GPIOParams
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val c = params
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//--------------------------------------------------
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// CSR Declarations
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@ -289,7 +285,7 @@ object GPIOInputPinCtrl {
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}
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// Magic TL2 Incantation to create a TL2 Slave
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class TLGPIO(c: GPIOConfig)(implicit p: Parameters)
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extends TLRegisterRouter(c.address, interrupts = c.width, beatBytes = p(PeripheryBusConfig).beatBytes)(
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new TLRegBundle(c, _) with GPIOBundle)(
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new TLRegModule(c, _, _) with GPIOModule)
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class TLGPIO(w: Int, c: GPIOParams)(implicit p: Parameters)
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extends TLRegisterRouter(c.address, interrupts = c.width, beatBytes = w)(
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new TLRegBundle(c, _) with HasGPIOBundleContents)(
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new TLRegModule(c, _, _) with HasGPIOModuleContents)
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