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spi: correct polarity of FIRRTL combo loop detection workaround.

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This commit is contained in:
Megan Wachs
2017-03-31 13:49:34 -07:00
parent 1af6ce1c85
commit 70ac4044d1
1 changed files with 1 additions and 1 deletions
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src/main/scala/devices/spi/SPIArbiter.scala
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@@ -21,7 +21,7 @@ class SPIArbiter(c: SPIParamsBase, n: Int) extends Module {
io.outer.cnt := Mux1H(sel, io.inner.map(_.cnt)) io.outer.cnt := Mux1H(sel, io.inner.map(_.cnt))
io.outer.fmt := Mux1H(sel, io.inner.map(_.fmt)) io.outer.fmt := Mux1H(sel, io.inner.map(_.fmt))
// Workaround for overzealous combinational loop detection // Workaround for overzealous combinational loop detection
io.outer.cs := Mux(sel(1), io.inner(0).cs, io.inner(1).cs) io.outer.cs := Mux(sel(0), io.inner(0).cs, io.inner(1).cs)
require(n == 2, "SPIArbiter currently only supports 2 clients") require(n == 2, "SPIArbiter currently only supports 2 clients")
(io.inner zip sel).foreach { case (inner, s) => (io.inner zip sel).foreach { case (inner, s) =>