diff --git a/src/main/scala/devices/gpio/GPIO.scala b/src/main/scala/devices/gpio/GPIO.scala
index 9dd8d87..8c4cfbd 100644
--- a/src/main/scala/devices/gpio/GPIO.scala
+++ b/src/main/scala/devices/gpio/GPIO.scala
@@ -5,7 +5,7 @@ import Chisel._
 import config.Parameters
 import regmapper._
 import uncore.tilelink2._
-import util.AsyncResetRegVec
+import util.{AsyncResetRegVec, GenericParameterizedBundle}
 
 case class GPIOParams(address: BigInt, width: Int)
 
@@ -93,7 +93,7 @@ class GPIOPin extends Bundle {
 // level, and we have to do the pinmux
 // outside of RocketChipTop.
 
-class GPIOPortIO(c: GPIOParams) extends Bundle {
+class GPIOPortIO(c: GPIOParams) extends GenericParameterizedBundle(c) {
   val pins = Vec(c.width, new GPIOPin)
   val iof_0 = Vec(c.width, new GPIOPinIOF).flip
   val iof_1 = Vec(c.width, new GPIOPinIOF).flip
diff --git a/src/main/scala/devices/spi/SPIBundle.scala b/src/main/scala/devices/spi/SPIBundle.scala
index 5e2cadb..cb96df5 100644
--- a/src/main/scala/devices/spi/SPIBundle.scala
+++ b/src/main/scala/devices/spi/SPIBundle.scala
@@ -2,8 +2,9 @@
 package sifive.blocks.devices.spi
 
 import Chisel._
+import util.GenericParameterizedBundle
 
-abstract class SPIBundle(val c: SPIParamsBase) extends Bundle {
+abstract class SPIBundle(val c: SPIParamsBase) extends GenericParameterizedBundle(c) {
   override def cloneType: SPIBundle.this.type =
     this.getClass.getConstructors.head.newInstance(c).asInstanceOf[this.type]
 }