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LazyModule: provide Parameters

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This tracks PR #478 in rocketchip.
This commit is contained in:
Wesley W. Terpstra
2016-12-07 13:21:20 -08:00
parent 1443834186
commit 45c491cd69
7 changed files with 27 additions and 27 deletions
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12
src/main/scala/devices/pwm/PWM.scala
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@ -56,9 +56,9 @@ case class PWMBundleConfig(
}
trait HasPWMParameters {
val params: (PWMConfig, Parameters)
val c = params._1
implicit val p = params._2
implicit val p: Parameters
val params: PWMConfig
val c = params
}
trait PWMBundle extends Bundle with HasPWMParameters {
@ -76,7 +76,7 @@ trait PWMModule extends Module with HasRegMap with HasPWMParameters {
regmap((GenericTimer.timerRegMap(pwm, 0, c.regBytes)):_*)
}
class TLPWM(c: PWMConfig)(implicit val p: Parameters)
class TLPWM(c: PWMConfig)(implicit p: Parameters)
extends TLRegisterRouter(c.address, interrupts = c.ncmp, size = c.size, beatBytes = p(PeripheryBusConfig).beatBytes)(
new TLRegBundle((c, p), _) with PWMBundle)(
new TLRegModule((c, p), _, _) with PWMModule)
new TLRegBundle(c, _) with PWMBundle)(
new TLRegModule(c, _, _) with PWMModule)