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PWM: Add the ability to invert the output directly in PWM (without GPIO pinmux)

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This commit is contained in:
Megan Wachs
2017-10-02 11:13:33 -07:00
parent 4fcf349adb
commit 3e47ed6b33
2 changed files with 9 additions and 3 deletions
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6
src/main/scala/devices/pwm/PWM.scala
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@@ -18,6 +18,7 @@ class PWM(val ncmp: Int = 4, val cmpWidth: Int = 16) extends GenericTimer {
protected lazy val feed = count.carryOut(scale + UInt(cmpWidth))
protected lazy val countEn = Wire(Bool())
override protected lazy val oneShot = RegEnable(io.regs.cfg.write.bits(13) && !countReset, Bool(false), (io.regs.cfg.write.valid && unlocked) || countReset)
override protected lazy val extra = RegEnable(io.regs.cfg.write.bits(20 + ncmp - 1, 20), init = 0.U, enable = io.regs.cfg.write.valid && unlocked)
override protected lazy val center = RegEnable(io.regs.cfg.write.bits(16 + ncmp - 1, 16), io.regs.cfg.write.valid && unlocked)
override protected lazy val gang = RegEnable(io.regs.cfg.write.bits(24 + ncmp - 1, 24), io.regs.cfg.write.valid && unlocked)
override protected lazy val deglitch = RegEnable(io.regs.cfg.write.bits(10), io.regs.cfg.write.valid && unlocked)(0)
@@ -33,7 +34,10 @@ class PWM(val ncmp: Int = 4, val cmpWidth: Int = 16) extends GenericTimer {
lazy val io = new GenericTimerIO {
val gpio = Vec(ncmp, Bool()).asOutput
}
io.gpio := io.gpio.fromBits(ip & ~(gang & Cat(ip(0), ip >> 1)))
val invert = extra
io.gpio := io.gpio.fromBits((ip & ~(gang & Cat(ip(0), ip >> 1))) ^ invert)
countEn := countAlways || oneShot
}