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rocket-chip/regression/Makefile
Andrew Waterman ed827678ac Write test harness in Chisel
This is an unavoidably invasive commit, because it affects the unit tests
(which formerly exited using stop()), the test harness Verilog generator
(since it is no longer necessary), and the DRAM model (since it is no
longer connected).  However, this should substantially reduce the effort
of building test harnesses in the future, since manual or semi-automatic
Verilog writing should no longer be necessary.  Furthermore, there is now
very little duplication of effort between the Verilator and VCS test
harnesses.

This commit removes support for DRAMsim, which is a bit of an unfortunate
consequence.  The main blocker is the lack of Verilog parameterization for
BlackBox.  It would be straightforward to revive DRAMsim once support for
that feature is added to Chisel and FIRRTL.  But that might not even be
necessary, as we move towards synthesizable DRAM models and FAME-1
transformations.
2016-08-15 23:27:27 -07:00

185 lines
8.4 KiB
Makefile

# The default target, which runs all regression targets.
regression: vsim-regression emulator-regression
# Regression targets for the various simulators.
%-regression: %-asm-tests %-bmark-tests
# Some targets can run torture
vsim-regression: vsim-torture
emulator-regression: emulator-torture
# The torture configuration to use
TORTURE_CONFIG ?= default
# The top-level directory that contains rocket-chip
TOP ?= ..
# The hash of the tools that we're using
TOOLS_HASH ?= $(shell git -C $(TOP) ls-tree HEAD -- riscv-tools | xargs echo | cut -d' ' -f3)
$(info Using riscv-tools of $(TOOLS_HASH))
# The directory that the tools get built into.
RISCV ?= install/$(TOOLS_HASH)
# Torture saves the failing tests into a directory, which defaults to just somehing inside the regressions directory.
TORTURE_SAVE_DIR ?= torture-failures
# Include top-level makefrag for options like rocketchip_addons
include $(TOP)/Makefrag
# Removes all the build stamps from the current config
.PHONY: clean
clean:
rm -rf stamps $(abspath $(RISCV))
$(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/vsim) clean
$(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/emulator) clean
ifeq ($(SUITE),)
$(error Set SUITE to the regression suite you want to run)
endif
ifeq ($(SUITE),RocketSuite)
CONFIGS=DefaultConfig DefaultL2Config DefaultBufferlessConfig TinyConfig
endif
ifeq ($(SUITE),GroundtestSuite)
CONFIGS=MemtestConfig MemtestBufferlessConfig MemtestStatelessConfig FancyMemtestConfig \
BroadcastRegressionTestConfig BufferlessRegressionTestConfig CacheRegressionTestConfig \
ComparatorConfig ComparatorBufferlessConfig ComparatorL2Config ComparatorStatelessConfig \
UnitTestConfig
endif
# These are the named regression targets. While it's expected you run them in
# this order, since there's dependencies for everything it doesn't actually
# matter. They're here to make running the various targets from the
# commandline a bit cleaner.
submodules: stamps/other-submodules.stamp
tools: $(RISCV)/install.stamp
EMU_DEBUG_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/emulator-debug.stamp)
EMU_NDEBUG_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/emulator-ndebug.stamp)
EMU_ASM_TEST_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/emulator-asm-tests.stamp)
EMU_BMARK_TEST_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/emulator-bmark-tests.stamp)
EMU_REGRESSION_TEST_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/emulator-regression-tests.stamp)
EMU_TORTURE_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/emulator-torture-$(TORTURE_CONFIG).stamp)
emulator-debug: $(EMU_DEBUG_STAMPS)
emulator-ndebug: $(EMU_NDEBUG_STAMPS)
emulator-asm-tests: $(EMU_ASM_TEST_STAMPS)
emulator-bmark-tests: $(EMU_BMARK_TEST_STAMPS)
emulator-regression-tests: $(EMU_REGRESSION_TEST_STAMPS)
emulator-torture: $(EMU_TORTURE_STAMPS)
VSIM_VERILOG_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/vsim-verilog.stamp)
VSIM_DEBUG_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/vsim-debug.stamp)
VSIM_NDEBUG_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/vsim-ndebug.stamp)
VSIM_ASM_TEST_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/vsim-asm-tests.stamp)
VSIM_BMARK_TEST_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/vsim-bmark-tests.stamp)
VSIM_REGRESSION_TEST_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/vsim-regression-tests.stamp)
VSIM_TORTURE_STAMPS=$(foreach config,$(CONFIGS),stamps/$(config)/vsim-torture-$(TORTURE_CONFIG).stamp)
vsim-verilog: $(VSIM_VERILOG_STAMPS)
vsim-debug: $(VSIM_DEBUG_STAMPS)
vsim-ndebug: $(VSIM_NDEBUG_STAMPS)
vsim-asm-tests: $(VSIM_ASM_TEST_STAMPS)
vsim-bmark-tests: $(VSIM_BMARK_TEST_STAMPS)
vsim-regression-tests: $(VSIM_REGRESSION_TEST_STAMPS)
vsim-torture: $(VSIM_TORTURE_STAMPS)
submodule_names = chisel3 context-dependent-environments firrtl groundtest hardfloat junctions rocket torture uncore $(ROCKETCHIP_ADDONS)
# Checks out all the rocket-chip submodules
stamps/other-submodules.stamp:
mkdir -p $(dir $@)
git -C $(abspath $(TOP)) submodule update --init --recursive $(submodule_names)
date > $@
$(RISCV)/install.stamp:
mkdir -p $(dir $@)
git -C $(abspath $(TOP)) submodule update --init riscv-tools
rm -f $(abspath $(TOP))/riscv-tools/.travis.yml
git -C $(abspath $(TOP))/riscv-tools submodule update --init --recursive riscv-gnu-toolchain
git -C $(abspath $(TOP))/riscv-tools submodule update --init --recursive riscv-isa-sim
git -C $(abspath $(TOP))/riscv-tools submodule update --init --recursive riscv-fesvr
git -C $(abspath $(TOP))/riscv-tools submodule update --init --recursive riscv-opcodes
git -C $(abspath $(TOP))/riscv-tools submodule update --init --recursive riscv-pk
git -C $(abspath $(TOP))/riscv-tools submodule update --init --recursive riscv-tests
+cd $(abspath $(TOP))/riscv-tools; RISCV=$(abspath $(RISCV)) ./build.sh
date > $@
# Builds the various simulators
stamps/%/emulator-verilog.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
+flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator CONFIG=$* RISCV=$(abspath $(RISCV)) verilog
date > $@
stamps/%/emulator-ndebug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
+flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator CONFIG=$* RISCV=$(abspath $(RISCV))
date > $@
stamps/%/emulator-debug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
+flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator CONFIG=$* RISCV=$(abspath $(RISCV)) debug
date > $@
stamps/%/vsim-verilog.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
+flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$* RISCV=$(abspath $(RISCV)) verilog
date > $@
stamps/%/vsim-ndebug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
+flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$* RISCV=$(abspath $(RISCV))
date > $@
stamps/%/vsim-debug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
+flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$* RISCV=$(abspath $(RISCV)) debug
date > $@
# Runs tests on one of the simulators
stamps/%/emulator-asm-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/emulator CONFIG=$* RISCV=$(abspath $(RISCV)) run-asm-tests-fast
date > $@
stamps/%/emulator-bmark-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/emulator CONFIG=$* RISCV=$(abspath $(RISCV)) run-bmark-tests-fast
date > $@
stamps/%/emulator-regression-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/emulator CONFIG=$* RISCV=$(abspath $(RISCV)) clean-run-output
$(MAKE) -C $(abspath $(TOP))/emulator CONFIG=$* RISCV=$(abspath $(RISCV)) run-regression-tests-fast
date > $@
stamps/%/vsim-asm-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$* RISCV=$(abspath $(RISCV)) run-asm-tests-fast
date > $@
stamps/%/vsim-bmark-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$* RISCV=$(abspath $(RISCV)) run-bmark-tests-fast
date > $@
stamps/%/vsim-regression-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$* RISCV=$(abspath $(RISCV)) clean-run-output
$(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$* RISCV=$(abspath $(RISCV)) run-regression-tests-fast
date > $@
# The torture tests run subtly differently on the different targets, so they
# don't have pattern rules like everything else does.
stamps/%/vsim-torture-$(TORTURE_CONFIG).stamp: stamps/%/vsim-debug.stamp stamps/%/vsim-ndebug.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/torture rnight RTL_CONFIG=$* RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10"
date > $@
stamps/%/emulator-torture-$(TORTURE_CONFIG).stamp: stamps/%/emulator-debug.stamp stamps/%/emulator-ndebug.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/torture cnight RTL_CONFIG=$* RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10"
date > $@