riscv/rocket-chip
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rocket-chip/vsim
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Palmer Dabbelt 7c0c48fac4 Resurrect the backup memory port 
We need this to work for our chip, and it's not been tested in a long
time in upstream -- it didn't even used to build since the Nasti
conversion.  This makes a few changes:

 * Rather than calling the backup memory port parameters MEM_*, it calls
   them MIF_* (to match the MIT* paramater objects).  A new name was
   necessary because the Nasti stuff is now dumped as MEM_*, which has
   similar names but incompatible values.

 * p(MIFDataBits) was changed back to 128, as otherwise the backup
   memory port doesn't work (it only send half a TileLink transaction).
   64 also causes readmemh to bail out, but changing the elf2hex parameters
   works around that.

 * A configuration was added that enabled the backup memory port in the
   tester.  While this is kind of an awkward way to do it, I want to
   make sure I can start testing this regularly and this makes it easy to
   integrate.
2016-02-27 10:46:56 -08:00
..
.gitignore update for rocket-chip release 2014-08-31 20:26:55 -07:00
Makefile Don't re-generate the .d files on "make clean" 2015-11-12 00:41:55 -08:00
Makefrag Resurrect the backup memory port 2016-02-27 10:46:56 -08:00
Makefrag-verilog add multichannel NASTI support in Verilog testbench 2015-11-05 10:48:32 -08:00
vlsi_mem_gen Massive update containing several months of changes from the now-defunct private chip repo. 2015-07-02 14:43:30 -07:00