355 lines
12 KiB
Scala
355 lines
12 KiB
Scala
// See LICENSE for license details.
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package uncore
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import Chisel._
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import scala.math.max
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case object TLId extends Field[String]
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case object TLCoherence extends Field[CoherencePolicy]
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case object TLAddrBits extends Field[Int]
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case object TLMasterXactIdBits extends Field[Int]
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case object TLClientXactIdBits extends Field[Int]
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case object TLDataBits extends Field[Int]
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case object TLDataBeats extends Field[Int]
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abstract trait TileLinkParameters extends UsesParameters {
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val tlAddrBits = params(TLAddrBits)
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val tlClientXactIdBits = params(TLClientXactIdBits)
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val tlMasterXactIdBits = params(TLMasterXactIdBits)
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val tlDataBits = params(TLDataBits)
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val tlDataBeats = params(TLDataBeats)
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val tlWriteMaskBits = if(tlDataBits/8 < 1) 1 else tlDataBits
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val tlSubblockAddrBits = log2Up(tlWriteMaskBits)
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val tlAtomicOpcodeBits = log2Up(NUM_XA_OPS)
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val tlUncachedOperandSizeBits = MT_SZ
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val tlSubblockUnionBits = max(tlWriteMaskBits,
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(tlSubblockAddrBits +
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tlUncachedOperandSizeBits +
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tlAtomicOpcodeBits))
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val co = params(TLCoherence)
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}
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abstract class TLBundle extends Bundle with TileLinkParameters
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abstract class TLModule extends Module with TileLinkParameters
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trait HasPhysicalAddress extends TLBundle {
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val addr = UInt(width = tlAddrBits)
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}
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trait HasClientTransactionId extends TLBundle {
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val client_xact_id = Bits(width = tlClientXactIdBits)
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}
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trait HasMasterTransactionId extends TLBundle {
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val master_xact_id = Bits(width = tlMasterXactIdBits)
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}
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trait HasTileLinkData extends TLBundle {
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val data = UInt(width = tlDataBits)
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}
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trait SourcedMessage extends TLBundle
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trait ClientSourcedMessage extends SourcedMessage
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trait MasterSourcedMessage extends SourcedMessage
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class Acquire extends ClientSourcedMessage
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with HasPhysicalAddress
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with HasClientTransactionId
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with HasTileLinkData {
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val uncached = Bool()
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val a_type = UInt(width = max(log2Up(Acquire.nUncachedAcquireTypes), co.acquireTypeWidth))
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val subblock = Bits(width = tlSubblockUnionBits)
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val sbAddrOff = tlSubblockAddrBits + tlUncachedOperandSizeBits
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val opSzOff = tlUncachedOperandSizeBits + sbAddrOff
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def operand_sz(dummy: Int = 0) = subblock(tlUncachedOperandSizeBits-1, 0)
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def subblock_addr(dummy: Int = 0) = subblock(sbAddrOff-1, tlUncachedOperandSizeBits)
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def atomic_op(dummy: Int = 0) = subblock(opSzOff-1, sbAddrOff)
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def write_mask(dummy: Int = 0) = subblock(tlWriteMaskBits-1, 0)
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def is(t: UInt) = a_type === t
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}
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object Acquire {
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val nUncachedAcquireTypes = 3
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//val uncachedRead :: uncachedWrite :: uncachedAtomic :: Nil = Enum(UInt(), nUncachedAcquireTypes)
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def uncachedRead = UInt(0)
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def uncachedWrite = UInt(1)
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def uncachedAtomic = UInt(2)
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def hasData(a_type: UInt) = Vec(uncachedWrite, uncachedAtomic).contains(a_type)
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def requiresOuterRead(a_type: UInt) = a_type != uncachedWrite
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def requiresOuterWrite(a_type: UInt) = a_type === uncachedWrite
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def apply(uncached: Bool, a_type: Bits, addr: UInt, client_xact_id: UInt, data: UInt, subblock: UInt): Acquire = {
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val acq = new Acquire
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acq.uncached := uncached
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acq.a_type := a_type
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acq.addr := addr
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acq.client_xact_id := client_xact_id
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acq.data := data
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acq.subblock := subblock
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acq
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}
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def apply(a_type: Bits, addr: UInt, client_xact_id: UInt, data: UInt): Acquire = {
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apply(Bool(false), a_type, addr, client_xact_id, data, UInt(0))
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}
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def apply(a_type: Bits, addr: UInt, client_xact_id: UInt): Acquire = {
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apply(a_type, addr, client_xact_id, UInt(0))
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}
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def apply(a: Acquire): Acquire = {
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val acq = new Acquire
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acq := a
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acq
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}
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}
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object UncachedRead {
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def apply(addr: UInt, client_xact_id: UInt, subblock_addr: UInt, operand_sz: UInt): Acquire = {
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val acq = Acquire(Acquire.uncachedRead, addr, client_xact_id)
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acq.uncached := Bool(true)
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acq.subblock := Cat(subblock_addr, operand_sz)
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acq
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}
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def apply(addr: UInt, client_xact_id: UInt): Acquire = {
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apply(addr, client_xact_id, UInt(0), MT_CB)
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}
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def apply(addr: UInt): Acquire = {
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apply(addr, UInt(0), UInt(0), MT_CB)
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}
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}
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object UncachedWrite {
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def apply(addr: UInt, client_xact_id: UInt, write_mask: Bits, data: UInt): Acquire = {
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val acq = Acquire(Acquire.uncachedWrite, addr, client_xact_id, data)
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acq.uncached := Bool(true)
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acq.subblock := write_mask
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acq
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}
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def apply(addr: UInt, client_xact_id: UInt, data: UInt): Acquire = {
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apply(addr, client_xact_id, SInt(-1), data)
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}
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def apply(addr: UInt, data: UInt): Acquire = {
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apply(addr, UInt(0), data)
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}
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}
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object UncachedAtomic {
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def apply(addr: UInt, client_xact_id: UInt, atomic_opcode: UInt,
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subblock_addr: UInt, operand_sz: UInt, data: UInt): Acquire = {
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val acq = Acquire(Acquire.uncachedAtomic, addr, client_xact_id, data)
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acq.uncached := Bool(true)
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acq.subblock := Cat(atomic_opcode, subblock_addr, operand_sz)
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acq
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}
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}
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object Probe {
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def apply(p_type: UInt, addr: UInt) = {
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val prb = new Probe
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prb.p_type := p_type
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prb.addr := addr
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prb
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}
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}
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class Probe extends MasterSourcedMessage
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with HasPhysicalAddress {
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val p_type = UInt(width = co.probeTypeWidth)
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def is(t: UInt) = p_type === t
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}
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object Release {
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def apply(r_type: UInt, addr: UInt, client_xact_id: UInt, data: UInt): Release = {
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val rel = new Release
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rel.r_type := r_type
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rel.addr := addr
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rel.client_xact_id := client_xact_id
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rel.data := data
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rel
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}
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def apply(r_type: UInt, addr: UInt, client_xact_id: UInt): Release = {
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apply(r_type, addr, client_xact_id, UInt(0))
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}
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def apply(r_type: UInt, addr: UInt): Release = {
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apply(r_type, addr, UInt(0), UInt(0))
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}
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}
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class Release extends ClientSourcedMessage
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with HasPhysicalAddress
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with HasClientTransactionId
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with HasTileLinkData {
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val r_type = UInt(width = co.releaseTypeWidth)
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def is(t: UInt) = r_type === t
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}
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class Grant extends MasterSourcedMessage
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with HasTileLinkData
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with HasClientTransactionId
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with HasMasterTransactionId {
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val uncached = Bool()
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val g_type = UInt(width = max(log2Up(Grant.nUncachedGrantTypes), co.grantTypeWidth))
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def is(t: UInt) = g_type === t
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}
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object Grant {
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val nUncachedGrantTypes = 3
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//val uncachedRead :: uncachedWrite :: uncachedAtomic :: Nil = Enum(UInt(), nUncachedGrantTypes)
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def uncachedRead = UInt(0)
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def uncachedWrite = UInt(1)
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def uncachedAtomic = UInt(2)
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def hasData(g_type: UInt) = Vec(uncachedRead, uncachedAtomic).contains(g_type)
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def apply(uncached: Bool, g_type: UInt, client_xact_id: UInt, master_xact_id: UInt, data: UInt): Grant = {
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val gnt = new Grant
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gnt.uncached := uncached
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gnt.g_type := g_type
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gnt.client_xact_id := client_xact_id
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gnt.master_xact_id := master_xact_id
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gnt.data := data
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gnt
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}
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def apply(uncached: Bool, g_type: UInt, client_xact_id: UInt, master_xact_id: UInt): Grant = {
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apply(uncached, g_type, client_xact_id, master_xact_id, UInt(0))
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}
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}
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class Finish extends ClientSourcedMessage with HasMasterTransactionId
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class UncachedTileLinkIO extends Bundle {
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val acquire = new DecoupledIO(new LogicalNetworkIO(new Acquire))
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val grant = new DecoupledIO(new LogicalNetworkIO(new Grant)).flip
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val finish = new DecoupledIO(new LogicalNetworkIO(new Finish))
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}
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class TileLinkIO extends UncachedTileLinkIO {
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val probe = new DecoupledIO(new LogicalNetworkIO(new Probe)).flip
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val release = new DecoupledIO(new LogicalNetworkIO(new Release))
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}
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class TileLinkIOWrapper extends TLModule {
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val io = new Bundle {
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val in = new UncachedTileLinkIO().flip
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val out = new TileLinkIO
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}
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io.out.acquire <> io.in.acquire
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io.out.grant <> io.in.grant
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io.out.finish <> io.in.finish
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io.out.probe.ready := Bool(false)
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io.out.release.valid := Bool(false)
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}
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object TileLinkIOWrapper {
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def apply[T <: Data](uncached: UncachedTileLinkIO) = {
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val conv = Module(new TileLinkIOWrapper)
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conv.io.in <> uncached
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conv.io.out
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}
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}
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abstract class TileLinkArbiterLike(val arbN: Int) extends TLModule {
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type MasterSourcedWithId = MasterSourcedMessage with HasClientTransactionId
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type ClientSourcedWithId = ClientSourcedMessage with HasClientTransactionId
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def clientSourcedClientXactId(in: ClientSourcedWithId, id: Int): Bits
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def masterSourcedClientXactId(in: MasterSourcedWithId): Bits
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def arbIdx(in: MasterSourcedWithId): UInt
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def hookupClientSource[M <: ClientSourcedWithId]
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(ins: Seq[DecoupledIO[LogicalNetworkIO[M]]],
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out: DecoupledIO[LogicalNetworkIO[M]]) {
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def hasData(m: LogicalNetworkIO[M]) = co.messageHasData(m.payload)
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val arb = Module(new LockingRRArbiter(out.bits.clone, arbN, params(TLDataBeats), Some(hasData _)))
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out <> arb.io.out
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ins.zipWithIndex.zip(arb.io.in).map{ case ((req,id), arb) => {
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arb.valid := req.valid
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arb.bits := req.bits
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arb.bits.payload.client_xact_id := clientSourcedClientXactId(req.bits.payload, id)
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req.ready := arb.ready
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}}
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}
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def hookupMasterSource[M <: MasterSourcedWithId]
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(ins: Seq[DecoupledIO[LogicalNetworkIO[M]]],
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out: DecoupledIO[LogicalNetworkIO[M]]) {
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out.ready := Bool(false)
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for (i <- 0 until arbN) {
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ins(i).valid := Bool(false)
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when (arbIdx(out.bits.payload) === UInt(i)) {
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ins(i).valid := out.valid
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out.ready := ins(i).ready
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}
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ins(i).bits := out.bits
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ins(i).bits.payload.client_xact_id := masterSourcedClientXactId(out.bits.payload)
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}
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}
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}
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abstract class UncachedTileLinkIOArbiter(n: Int)
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extends TileLinkArbiterLike(n) {
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val io = new Bundle {
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val in = Vec.fill(n){new UncachedTileLinkIO}.flip
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val out = new UncachedTileLinkIO
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}
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hookupClientSource(io.in.map(_.acquire), io.out.acquire)
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hookupMasterSource(io.in.map(_.grant), io.out.grant)
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val finish_arb = Module(new RRArbiter(new LogicalNetworkIO(new Finish), n))
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io.out.finish <> finish_arb.io.out
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finish_arb.io.in zip io.in map { case (arb, req) => arb <> req.finish }
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}
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abstract class TileLinkIOArbiter(n: Int) extends TileLinkArbiterLike(n) {
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val io = new Bundle {
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val in = Vec.fill(n){new TileLinkIO}.flip
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val out = new TileLinkIO
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}
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hookupClientSource(io.in.map(_.acquire), io.out.acquire)
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hookupClientSource(io.in.map(_.release), io.out.release)
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hookupMasterSource(io.in.map(_.grant), io.out.grant)
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io.in.map{ _.probe.valid := io.out.probe.valid }
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io.in.map{ _.probe.bits := io.out.probe.bits }
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io.out.probe.ready := io.in.map(_.probe.ready).reduce(_||_)
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val finish_arb = Module(new RRArbiter(new LogicalNetworkIO(new Finish), n))
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io.out.finish <> finish_arb.io.out
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finish_arb.io.in zip io.in map { case (arb, req) => arb <> req.finish }
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}
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abstract trait AppendsArbiterId {
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val arbN: Int
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def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) =
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Cat(in.client_xact_id, UInt(id, log2Up(arbN)))
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def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id >> UInt(log2Up(arbN))
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def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id(log2Up(arbN)-1,0).toUInt
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}
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abstract trait PassesId {
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def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) =
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in.client_xact_id
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def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id
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def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id
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}
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abstract trait UsesNewId {
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val arbN: Int
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def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) =
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UInt(id, log2Up(arbN))
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def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) =
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UInt(0)
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def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id
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}
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class UncachedTileLinkIOArbiterThatAppendsArbiterId(val n: Int) extends UncachedTileLinkIOArbiter(n) with AppendsArbiterId
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class UncachedTileLinkIOArbiterThatPassesId(val n: Int) extends UncachedTileLinkIOArbiter(n) with PassesId
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class UncachedTileLinkIOArbiterThatUsesNewId(val n: Int) extends UncachedTileLinkIOArbiter(n) with UsesNewId
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class TileLinkIOArbiterThatAppendsArbiterId(val n: Int) extends TileLinkIOArbiter(n) with AppendsArbiterId
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class TileLinkIOArbiterThatPassesId(val n: Int) extends TileLinkIOArbiter(n) with PassesId
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class TileLinkIOArbiterThatUsesNewId(val n: Int) extends TileLinkIOArbiter(n) with UsesNewId
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