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2017-10-25 16:56:51 -07:00

15 lines
579 B
Scala

// See LICENSE.SiFive for license details.
package freechips.rocketchip
import Chisel._
import freechips.rocketchip.diplomacy._
package object interrupts
{
type IntInwardNode = InwardNodeHandle[IntSourcePortParameters, IntSinkPortParameters, Vec[Bool]]
type IntOutwardNode = OutwardNodeHandle[IntSourcePortParameters, IntSinkPortParameters, Vec[Bool]]
type IntSyncInwardNode = InwardNodeHandle[IntSourcePortParameters, IntSinkPortParameters, SyncInterrupts]
type IntSyncOutwardNode = OutwardNodeHandle[IntSourcePortParameters, IntSinkPortParameters, SyncInterrupts]
}