Megan Wachs fda4c2bd76 Add a way to create Async Reset Registers and a way to easily access them with TL2

2016-09-08 20:02:07 -07:00

..

.gitignore

Write test harness in Chisel

2016-08-15 23:27:27 -07:00

Makefile

allow override of vlsi_mem_gen script

2016-09-06 14:44:12 -07:00

Makefrag

Add a way to create Async Reset Registers and a way to easily access them with TL2

2016-09-08 20:02:07 -07:00

Makefrag-verilog

Turn on the inferRW Firrtl pass

2016-09-07 15:27:26 -07:00

vlsi_mem_gen

fix null statement in vsli_mem_gen ala firrtl#264 (#252)

2016-09-07 11:04:36 -07:00