riscv/rocket-chip
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b625e68360
rocket-chip/src/main/scala/devices/tilelink
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Henry Cook b625e68360
tile: put a BasicBusBlocker inside RocketTile (#1115) 
...instead of on the master side of the system bus.

People inheriting from HasTileMasterPort might need to add
`masterNode := tileBus.node` to their Tile child class.
2017-11-17 17:26:48 -08:00
..
BootROM.scala diplomacy: change API to auto-create node bundles => cross-module refs 2017-09-22 15:01:39 -07:00
BusBlocker.scala tile: put a BasicBusBlocker inside RocketTile (#1115) 2017-11-17 17:26:48 -08:00
BusBypass.scala BusBypass: only stall A once the last beat is accepted (#1090) 2017-11-06 11:13:15 -08:00
Clint.scala IntNodes: moved from tilelink to their own package 2017-10-25 16:56:51 -07:00
Error.scala tilelink: add DeadlockDevice 2017-10-11 12:44:23 -07:00
MaskROM.scala diplomacy: change API to auto-create node bundles => cross-module refs 2017-09-22 15:01:39 -07:00
Plic.scala IntNodes: moved from tilelink to their own package 2017-10-25 16:56:51 -07:00
TestRAM.scala diplomacy: use new node style chaining 2017-10-28 11:34:16 -07:00
Zero.scala diplomacy: change API to auto-create node bundles => cross-module refs 2017-09-22 15:01:39 -07:00