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riscv/rocket-chip
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ac205ca10a51beec0b0ac53e24edf6fe2aa21f0c
rocket-chip/src/main/scala
T
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Wesley W. Terpstra ac205ca10a bootrom: move to 0x10000 for more space (DTB on multicore is big)
2017-03-24 18:18:01 -07:00
..
config
Configs: use a uniform syntax without Match exceptions (#507)
2017-01-13 14:41:19 -08:00
coreplex
GenerateBootROM: use compiled DTB
2017-03-24 18:18:01 -07:00
diplomacy
GenerateBootROM: use compiled DTB
2017-03-24 18:18:01 -07:00
groundtest
Default to 8 PMPs; support 0 PMPs
2017-03-24 16:39:52 -07:00
junctions
Fixed Hasti can't handle N masters to one slave #571 (#576)
2017-03-13 20:36:53 -07:00
regmapper
copyright: ran scripts/modify-copyright
2016-11-27 22:15:43 -08:00
rocket
Default to 8 PMPs; support 0 PMPs
2017-03-24 16:39:52 -07:00
rocketchip
bootrom: move to 0x10000 for more space (DTB on multicore is big)
2017-03-24 18:18:01 -07:00
tile
PUM -> SUM
2017-03-24 16:39:52 -07:00
uncore
Support SFENCE.VMA rs1 argument
2017-03-24 16:39:52 -07:00
unittest
apb: put both aFlow options under regression
2017-03-16 15:36:14 -07:00
util
Add performance counter facility
2017-03-09 13:58:50 -08:00
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