Henry Cook a281ad8ad2 rocketchip: rename some periphery ports

2017-02-23 18:28:04 -08:00

..

config

Configs: use a uniform syntax without Match exceptions (#507)

2017-01-13 14:41:19 -08:00

coreplex

coreplex: assume L1 runs no slower than L2

2017-02-17 15:15:41 +01:00

diplomacy

diplomacy: use HeterogeneousBag instead of Vec

2017-02-22 17:05:22 -08:00

groundtest

Heterogeneous Tiles (#550)

2017-02-09 13:59:09 -08:00

junctions

rocketchip: work-around ucb-bar/chisel3#472

2017-01-31 14:20:02 -08:00

regmapper

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

rocket

coreplex: assume L1 runs no slower than L2

2017-02-17 15:15:41 +01:00

rocketchip

rocketchip: rename some periphery ports

2017-02-23 18:28:04 -08:00

tile

Heterogeneous Tiles (#550)

2017-02-09 13:59:09 -08:00

uncore

tilelink2: support unused IntXing

2017-02-22 18:41:06 -08:00

unittest

Artefact output (#545)

2017-02-02 19:24:55 -08:00

util

ClockDivider: add docs to appease the reviewer

2017-02-17 19:35:08 +01:00