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rocket-chip
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930438adba
rocket-chip
/
src
/
main
/
scala
History
Wesley W. Terpstra
930438adba
tilelink2 SourceShrinker: destroy FIFO behaviour
2017-03-21 11:16:51 -07:00
..
config
Configs: use a uniform syntax without Match exceptions (
#507
)
2017-01-13 14:41:19 -08:00
coreplex
WIP on priv-1.10
2017-03-09 11:29:51 -08:00
diplomacy
TLBuffer: move TLBufferParams to diplomacy.BufferParams
2017-03-16 15:19:36 -07:00
groundtest
Avoid VM exceptions in groundtest by setting Accessed bit
2017-03-09 16:48:28 -08:00
junctions
Fixed Hasti can't handle N masters to one slave
#571
(
#576
)
2017-03-13 20:36:53 -07:00
regmapper
copyright: ran scripts/modify-copyright
2016-11-27 22:15:43 -08:00
rocket
tilelink2: define is{Request,Response} based on spec
2017-03-20 13:41:02 -07:00
rocketchip
rocket: allow scratchpad address to be configurable (
#570
)
2017-03-06 21:35:45 -08:00
tile
Perform all illegal-instruction detection in ID stage
2017-03-09 11:29:51 -08:00
uncore
tilelink2 SourceShrinker: destroy FIFO behaviour
2017-03-21 11:16:51 -07:00
unittest
apb: put both aFlow options under regression
2017-03-16 15:36:14 -07:00
util
Add performance counter facility
2017-03-09 13:58:50 -08:00