63 lines
2.3 KiB
Scala
63 lines
2.3 KiB
Scala
// See LICENSE.SiFive for license details.
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package freechips.rocketchip.devices.tilelink
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import Chisel._
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import freechips.rocketchip.config.{Field, Parameters}
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import freechips.rocketchip.subsystem.HasMemoryBus
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import freechips.rocketchip.diplomacy._
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import freechips.rocketchip.tilelink._
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class TLZero(address: AddressSet, resources: Seq[Resource], executable: Boolean = true, beatBytes: Int = 4)(implicit p: Parameters) extends LazyModule
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{
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val node = TLManagerNode(Seq(TLManagerPortParameters(
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Seq(TLManagerParameters(
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address = List(address),
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resources = resources,
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regionType = RegionType.UNCACHED,
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executable = executable,
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supportsGet = TransferSizes(1, beatBytes),
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supportsPutPartial = TransferSizes(1, beatBytes),
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supportsPutFull = TransferSizes(1, beatBytes),
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fifoId = Some(0))), // requests are handled in order
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beatBytes = beatBytes,
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minLatency = 1))) // no bypass needed for this device
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lazy val module = new LazyModuleImp(this) {
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val (in, edge) = node.in(0)
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val a = Queue(in.a, 2)
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val hasData = edge.hasData(a.bits)
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a.ready := in.d.ready
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in.d.valid := a.valid
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in.d.bits := edge.AccessAck(a.bits)
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in.d.bits.opcode := Mux(hasData, TLMessages.AccessAck, TLMessages.AccessAckData)
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// Tie off unused channels
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in.b.valid := Bool(false)
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in.c.ready := Bool(true)
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in.e.ready := Bool(true)
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}
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}
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/* Specifies the location of the Zero device */
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case class ZeroParams(base: Long, size: Long, beatBytes: Int)
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case object ZeroParams extends Field[ZeroParams]
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/** Adds a /dev/null slave that generates zero-filled responses to reads */
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trait HasMemoryZeroSlave extends HasMemoryBus {
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private val params = p(ZeroParams)
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private val device = new SimpleDevice("rom", Seq("ucbbar,cacheable-zero0"))
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val zeros = memBuses.map(_.toVariableWidthSlave).zipWithIndex.map { case (node, channel) =>
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val channels = memBuses.size
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val base = AddressSet(params.base, params.size-1)
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val filter = AddressSet(channel * cacheBlockBytes, ~((channels-1) * cacheBlockBytes))
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val address = base.intersect(filter).get
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val zero = LazyModule(new TLZero(address, beatBytes = params.beatBytes, resources = device.reg("mem")))
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zero.node := node
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zero
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}
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}
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