Ben Keller 6be569be9f Turn on the inferRW Firrtl pass ...

Without this, all of the memories wind up as two-ported.

2016-09-07 15:27:26 -07:00

..

.gitignore

Write test harness in Chisel

2016-08-15 23:27:27 -07:00

Makefile

allow override of vlsi_mem_gen script

2016-09-06 14:44:12 -07:00

Makefrag

Bump FIRRTL to instantiate Sequential Memory Macros

2016-09-06 14:48:28 -07:00

Makefrag-verilog

Turn on the inferRW Firrtl pass

2016-09-07 15:27:26 -07:00

vlsi_mem_gen

fix null statement in vsli_mem_gen ala firrtl#264 (#252)

2016-09-07 11:04:36 -07:00