693489da87
I made a clean checkout of reference-chip yesterday and wasn't able to build the debug emulator without first having built the non-debug emulator. I just added a note to the README to say this.
75 lines
1.6 KiB
Plaintext
75 lines
1.6 KiB
Plaintext
Quick and dirty instructions:
|
|
|
|
CHECKOUT THE CODE:
|
|
|
|
git submodule update --init --recursive
|
|
|
|
|
|
BUILDING THE TOOLCHAIN:
|
|
|
|
To build RISC-V ISA simulator, frontend server, proxy kernel and newlib based GNU toolchain:
|
|
|
|
export RISCV=/path/to/riscv/toolchain/installation
|
|
cd riscv-tools
|
|
./build.sh
|
|
|
|
To build asm tests and benchmarks (you must have the RISC-V toolchain installed and in your path):
|
|
|
|
cd riscv-tests/isa/
|
|
make -j
|
|
|
|
cd riscv-tests/benchmarks
|
|
make -j
|
|
|
|
BUILDING THE PROJECT:
|
|
|
|
To build the C simulator:
|
|
|
|
cd emulator
|
|
make
|
|
|
|
To build the VCS simulator:
|
|
|
|
cd vlsi/build/vcs-sim-rtl
|
|
make
|
|
|
|
in either case, you can run a set of assembly tests or simple benchmarks:
|
|
|
|
make run-asm-tests
|
|
make run-vecasm-tests
|
|
make run-vecasm-timer-tests
|
|
make run-bmarks-test
|
|
|
|
To build a C simulator that is capable of VCD waveform generation:
|
|
|
|
cd emulator
|
|
make emulator-debug
|
|
|
|
(note that you must have run "make emulator" at least once before
|
|
running "make emulator-debug")
|
|
|
|
And to run the assembly tests on the C simulator and generate waveforms:
|
|
|
|
make run-asm-tests-debug
|
|
make run-vecasm-tests-debug
|
|
make run-vecasm-timer-tests-debug
|
|
make run-bmarks-test-debug
|
|
|
|
|
|
UPDATING TO A NEWER VERSION OF CHISEL:
|
|
|
|
To grab a newer version of chisel:
|
|
|
|
git submodule update --init
|
|
cd chisel
|
|
git pull origin master
|
|
|
|
Then, to compile it and install it into the rocket repo:
|
|
|
|
cd sbt
|
|
sbt package
|
|
cp chisel/target/scala-2.8.1/chisel_2.8.1-1.1.jar ../../sbt/work/lib
|
|
|
|
If you commit a new jar, you must also commit the updated chisel submodule.
|
|
|