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rocket-chip/.gitmodules
Megan Wachs dd4a50c452 Add JTAG DTM and test support in simulation
Initial cut

checkpoint which compiles and runs but there is some off-by-1 in the protocol

Debugging the clock crossing logic

checkpoint which works

Clean up the AsyncMailbox black box
2016-08-19 16:08:17 -07:00

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[submodule "riscv-tools"]
path = riscv-tools
url = https://github.com/riscv/riscv-tools.git
[submodule "hardfloat"]
path = hardfloat
url = https://github.com/ucb-bar/berkeley-hardfloat.git
[submodule "context-dependent-environments"]
path = context-dependent-environments
url = https://github.com/ucb-bar/context-dependent-environments
[submodule "torture"]
path = torture
url = https://github.com/ucb-bar/riscv-torture.git
[submodule "chisel3"]
path = chisel3
url = https://github.com/ucb-bar/chisel3.git
[submodule "firrtl"]
path = firrtl
url = https://github.com/ucb-bar/firrtl.git
[submodule "openocd"]
path = openocd
url = http://github.com/sifive/openocd.git