Wesley W. Terpstra 644f8fe974 rocketchip: switch to TL2 mmio + port PRCI

2016-09-15 21:28:56 -07:00

..

Bram.scala

First cut at refactoring unittests into a top-level utility. Individual tests co-located with their DUT. No functional changes.

2016-09-13 20:30:14 -07:00

Debug.scala

move junctions utils into top-level utils package

2016-09-13 20:47:04 -07:00

Plic.scala

Support a degenerate PLIC with no interrupts

2016-09-07 11:21:13 -07:00

Prci.scala

rocketchip: switch to TL2 mmio + port PRCI

2016-09-15 21:28:56 -07:00

Rom.scala

devices: TL2 version of ROM

2016-09-15 21:28:56 -07:00