riscv/rocket-chip
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rocket-chip/emulator
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Andrew Waterman 568bfa6c50 Purge legacy HTIF things 
The SCR file is gone, too, because it was tightly coupled.  The
general concept could be revived as a module that somehow connects
to the debug module.
2016-06-23 13:23:57 -07:00
..
dramsim2_ini Added dramsim2 memory model to the emulator backend 2012-10-14 14:06:28 -07:00
.gitignore Install Verilator when building the emulator 2016-06-14 21:21:43 -07:00
Makefile replace emulator with verilator for chisel3 2016-06-08 02:43:54 -07:00
Makefrag-emulator Purge legacy HTIF things 2016-06-23 13:23:57 -07:00
Makefrag-verilator Purge legacy HTIF things 2016-06-23 13:23:57 -07:00