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rocket-chip/src/main/scala
2016-11-04 13:35:36 -07:00
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coreplex coreplex: make 'mem' port an Option until we can use a Seq 2016-11-04 13:35:36 -07:00
diplomacy tilelink2 Xbar: merge the AddressSets of fractured managers 2016-11-03 22:18:28 -07:00
groundtest rocketchip: must create bundles within Module scope 2016-10-31 11:42:47 -07:00
junctions rocketchip: all of the address map now comes from TL2 2016-10-31 11:42:44 -07:00
regmapper regmapper RegisterCrossing: safe AsyncQueues are overkill here 2016-10-14 18:28:31 -07:00
rocket rocket scratchpad: support atomics 2016-10-31 11:42:47 -07:00
rocketchip rocketchip: connect rtcTick to coreplex 2016-10-31 11:42:47 -07:00
uncore tilelink2 Broadcast: support "bufferless" implementation 2016-11-04 13:35:36 -07:00
unittest diplomacy: print out bus widths on edges in agent graph 2016-10-31 11:42:47 -07:00
util Fixed AsyncFifo with reset messaging 2016-10-25 16:45:08 -07:00