Scott Johnson 96e2cefb34 Merge branch 'master' into HEAD

2016-08-22 11:37:30 -07:00

..

AsyncMailbox.v

This commit adds Logic & test support for JTAG implementation of Debug Transport Module.

2016-08-19 16:08:31 -07:00

DebugTransportModuleJtag.v

Add JTAG DTM and test support in simulation

2016-08-19 16:08:17 -07:00

jtag_vpi.tab

Add JTAG DTM and test support in simulation

2016-08-19 16:08:17 -07:00

jtag_vpi.v

Add JTAG DTM and test support in simulation

2016-08-19 16:08:17 -07:00

SimDTM.v

Write test harness in Chisel

2016-08-15 23:27:27 -07:00

TestDriver.v

enable the TestDriver to be used in a SystemVerilog UVM-based testbench, which has its own way to manage end-of-simulation and does not like anyone else to call $finish

2016-08-19 17:14:54 -07:00