276 lines
10 KiB
Scala
276 lines
10 KiB
Scala
package uncore
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import Chisel._
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case class TileLinkConfiguration(co: CoherencePolicyWithUncached, ln: LogicalNetworkConfiguration, addrBits: Int, masterXactIdBits: Int, clientXactIdBits: Int, dataBits: Int, writeMaskBits: Int, wordAddrBits: Int, atomicOpBits: Int)
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abstract trait TileLinkSubBundle extends Bundle {
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implicit val tlconf: TileLinkConfiguration
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override def clone = this.getClass.getConstructors.head.newInstance(tlconf).asInstanceOf[this.type]
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}
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trait HasPhysicalAddress extends TileLinkSubBundle {
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val addr = UInt(width = tlconf.addrBits)
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}
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trait HasClientTransactionId extends TileLinkSubBundle {
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val client_xact_id = Bits(width = tlconf.clientXactIdBits)
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}
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trait HasMasterTransactionId extends TileLinkSubBundle {
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val master_xact_id = Bits(width = tlconf.masterXactIdBits)
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}
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trait HasTileLinkData extends TileLinkSubBundle {
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val data = Bits(width = tlconf.dataBits)
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}
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trait SourcedMessage extends Bundle
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trait ClientSourcedMessage extends SourcedMessage
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trait MasterSourcedMessage extends SourcedMessage
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object Acquire
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{
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def apply(a_type: Bits, addr: UInt, client_xact_id: UInt)(implicit conf: TileLinkConfiguration): Acquire = {
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val acq = new Acquire
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acq.a_type := a_type
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acq.addr := addr
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acq.client_xact_id := client_xact_id
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acq.data := Bits(0)
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acq.write_mask := Bits(0)
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acq.subword_addr := Bits(0)
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acq.atomic_opcode := Bits(0)
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acq
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}
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def apply(a_type: Bits, addr: UInt, client_xact_id: UInt, data: UInt)(implicit conf: TileLinkConfiguration): Acquire = {
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val acq = apply(a_type, addr, client_xact_id)
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acq.data := data
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acq
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}
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def apply(a_type: UInt, addr: UInt, client_xact_id: UInt, write_mask: Bits, data: UInt)(implicit conf: TileLinkConfiguration): Acquire = {
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val acq = apply(a_type, addr, client_xact_id, data)
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acq.write_mask := write_mask
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acq
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}
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def apply(a_type: UInt, addr: UInt, client_xact_id: UInt, subword_addr: UInt, atomic_opcode: UInt, data: UInt)(implicit conf: TileLinkConfiguration): Acquire = {
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val acq = apply(a_type, addr, client_xact_id, data)
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acq.subword_addr := subword_addr
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acq.atomic_opcode := atomic_opcode
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acq
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}
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def apply(a: Acquire)(implicit conf: TileLinkConfiguration): Acquire = {
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val acq = new Acquire
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acq := a
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acq
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}
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}
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class Acquire(implicit val tlconf: TileLinkConfiguration) extends ClientSourcedMessage
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with HasPhysicalAddress
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with HasClientTransactionId
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with HasTileLinkData {
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val a_type = UInt(width = tlconf.co.acquireTypeWidth)
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val write_mask = Bits(width = tlconf.writeMaskBits)
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val subword_addr = Bits(width = tlconf.wordAddrBits)
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val atomic_opcode = Bits(width = tlconf.atomicOpBits)
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}
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object Probe
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{
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def apply(p_type: UInt, addr: UInt, master_xact_id: UInt)(implicit conf: TileLinkConfiguration) = {
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val prb = new Probe
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prb.p_type := p_type
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prb.addr := addr
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prb.master_xact_id := master_xact_id
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prb
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}
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}
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class Probe(implicit val tlconf: TileLinkConfiguration) extends MasterSourcedMessage
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with HasPhysicalAddress
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with HasMasterTransactionId {
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val p_type = UInt(width = tlconf.co.probeTypeWidth)
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}
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object Release
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{
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def apply(r_type: UInt, addr: UInt, data: UInt)(implicit conf: TileLinkConfiguration) = {
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val rel = new Release
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rel.r_type := r_type
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rel.addr := addr
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rel.data := data
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rel
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}
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def apply(r_type: UInt, addr: UInt, client_xact_id: UInt, master_xact_id: UInt)(implicit conf: TileLinkConfiguration) = {
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val rel = new Release
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rel.r_type := r_type
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rel.addr := addr
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rel.client_xact_id := client_xact_id
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rel.master_xact_id := master_xact_id
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rel.data := UInt(0)
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rel
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}
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def apply(r_type: UInt, addr: UInt, client_xact_id: UInt, master_xact_id: UInt, data: UInt)(implicit conf: TileLinkConfiguration): Release = {
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val rel = apply(r_type, addr, client_xact_id, master_xact_id)
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rel.data := data
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rel
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}
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}
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class Release(implicit val tlconf: TileLinkConfiguration) extends ClientSourcedMessage
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with HasPhysicalAddress
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with HasClientTransactionId
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with HasMasterTransactionId
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with HasTileLinkData {
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val r_type = UInt(width = tlconf.co.releaseTypeWidth)
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}
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object Grant
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{
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def apply(g_type: UInt, client_xact_id: UInt, master_xact_id: UInt)(implicit conf: TileLinkConfiguration) = {
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val gnt = new Grant
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gnt.g_type := g_type
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gnt.client_xact_id := client_xact_id
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gnt.master_xact_id := master_xact_id
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gnt.data := UInt(0)
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gnt
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}
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def apply(g_type: UInt, client_xact_id: UInt, master_xact_id: UInt, data: UInt)(implicit conf: TileLinkConfiguration): Grant = {
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val gnt = apply(g_type, client_xact_id, master_xact_id)
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gnt.data := data
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gnt
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}
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}
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class Grant(implicit val tlconf: TileLinkConfiguration) extends MasterSourcedMessage
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with HasTileLinkData
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with HasClientTransactionId
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with HasMasterTransactionId {
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val g_type = UInt(width = tlconf.co.grantTypeWidth)
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}
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class GrantAck(implicit val tlconf: TileLinkConfiguration) extends ClientSourcedMessage with HasMasterTransactionId
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class UncachedTileLinkIO(implicit conf: TileLinkConfiguration) extends Bundle {
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implicit val ln = conf.ln
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val acquire = new DecoupledIO(new LogicalNetworkIO(new Acquire))
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val grant = new DecoupledIO(new LogicalNetworkIO(new Grant)).flip
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val grant_ack = new DecoupledIO(new LogicalNetworkIO(new GrantAck))
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override def clone = { new UncachedTileLinkIO().asInstanceOf[this.type] }
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}
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class TileLinkIO(implicit conf: TileLinkConfiguration) extends UncachedTileLinkIO()(conf) {
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val probe = new DecoupledIO(new LogicalNetworkIO(new Probe)).flip
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val release = new DecoupledIO(new LogicalNetworkIO(new Release))
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override def clone = { new TileLinkIO().asInstanceOf[this.type] }
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}
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abstract class TileLinkArbiterLike(val arbN: Int)(implicit conf: TileLinkConfiguration) extends Module {
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implicit val (ln, co) = (conf.ln, conf.co)
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type MasterSourcedWithId = MasterSourcedMessage with HasClientTransactionId
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type ClientSourcedWithId = ClientSourcedMessage with HasClientTransactionId
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def clientSourcedClientXactId(in: ClientSourcedWithId, id: Int): Bits
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def masterSourcedClientXactId(in: MasterSourcedWithId): Bits
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def arbIdx(in: MasterSourcedWithId): UInt
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def hookupClientSource[M <: ClientSourcedWithId]
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(ins: Seq[DecoupledIO[LogicalNetworkIO[M]]],
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out: DecoupledIO[LogicalNetworkIO[M]]) {
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def hasData(m: LogicalNetworkIO[M]) = co.messageHasData(m.payload)
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val arb = Module(new RRArbiter(out.bits.clone, arbN))
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out <> arb.io.out
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ins.zipWithIndex.zip(arb.io.in).map{ case ((req,id), arb) => {
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arb.valid := req.valid
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arb.bits := req.bits
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arb.bits.payload.client_xact_id := clientSourcedClientXactId(req.bits.payload, id)
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req.ready := arb.ready
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}}
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}
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def hookupMasterSource[M <: MasterSourcedWithId]
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(ins: Seq[DecoupledIO[LogicalNetworkIO[M]]],
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out: DecoupledIO[LogicalNetworkIO[M]]) {
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out.ready := Bool(false)
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for (i <- 0 until arbN) {
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ins(i).valid := Bool(false)
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when (arbIdx(out.bits.payload) === UInt(i)) {
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ins(i).valid := out.valid
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out.ready := ins(i).ready
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}
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ins(i).bits := out.bits
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ins(i).bits.payload.client_xact_id := masterSourcedClientXactId(out.bits.payload)
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}
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}
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}
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abstract class UncachedTileLinkIOArbiter(n: Int)(implicit conf: TileLinkConfiguration) extends TileLinkArbiterLike(n)(conf) {
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val io = new Bundle {
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val in = Vec.fill(n){new UncachedTileLinkIO}.flip
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val out = new UncachedTileLinkIO
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}
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hookupClientSource(io.in.map(_.acquire), io.out.acquire)
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hookupMasterSource(io.in.map(_.grant), io.out.grant)
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val grant_ack_arb = Module(new RRArbiter(new LogicalNetworkIO(new GrantAck), n))
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io.out.grant_ack <> grant_ack_arb.io.out
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grant_ack_arb.io.in zip io.in map { case (arb, req) => arb <> req.grant_ack }
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}
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abstract class TileLinkIOArbiter(n: Int)(implicit conf: TileLinkConfiguration) extends TileLinkArbiterLike(n)(conf) {
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val io = new Bundle {
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val in = Vec.fill(n){new TileLinkIO}.flip
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val out = new TileLinkIO
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}
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hookupClientSource(io.in.map(_.acquire), io.out.acquire)
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hookupClientSource(io.in.map(_.release), io.out.release)
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hookupMasterSource(io.in.map(_.grant), io.out.grant)
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io.in.map{ _.probe.valid := io.out.probe.valid }
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io.in.map{ _.probe.bits := io.out.probe.bits }
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io.out.probe.ready := io.in.map(_.probe.ready).reduce(_||_)
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val grant_ack_arb = Module(new RRArbiter(new LogicalNetworkIO(new GrantAck), n))
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io.out.grant_ack <> grant_ack_arb.io.out
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grant_ack_arb.io.in zip io.in map { case (arb, req) => arb <> req.grant_ack }
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}
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abstract trait AppendsArbiterId {
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val arbN: Int
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def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) =
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Cat(in.client_xact_id, UInt(id, log2Up(arbN)))
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def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id >> UInt(log2Up(arbN))
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def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id(log2Up(arbN)-1,0).toUInt
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}
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abstract trait PassesId {
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def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) =
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in.client_xact_id
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def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id
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def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id
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}
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abstract trait UsesNewId {
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val arbN: Int
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def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) =
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UInt(id, log2Up(arbN))
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def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) =
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UInt(0)
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def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) =
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in.client_xact_id
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}
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class UncachedTileLinkIOArbiterThatAppendsArbiterId(val n: Int)(implicit conf: TileLinkConfiguration) extends UncachedTileLinkIOArbiter(n)(conf) with AppendsArbiterId
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class UncachedTileLinkIOArbiterThatPassesId(val n: Int)(implicit conf: TileLinkConfiguration) extends UncachedTileLinkIOArbiter(n)(conf) with PassesId
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class UncachedTileLinkIOArbiterThatUsesNewId(val n: Int)(implicit conf: TileLinkConfiguration) extends UncachedTileLinkIOArbiter(n)(conf) with UsesNewId
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class TileLinkIOArbiterThatAppendsArbiterId(val n: Int)(implicit conf: TileLinkConfiguration) extends TileLinkIOArbiter(n)(conf) with AppendsArbiterId
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class TileLinkIOArbiterThatPassesId(val n: Int)(implicit conf: TileLinkConfiguration) extends TileLinkIOArbiter(n)(conf) with PassesId
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class TileLinkIOArbiterThatUsesNewId(val n: Int)(implicit conf: TileLinkConfiguration) extends TileLinkIOArbiter(n)(conf) with UsesNewId
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