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riscv/rocket-chip
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36562ce48e0c5ec098e8da69fd681afe83cd7de9
rocket-chip/src/main/scala/rocketchip
T
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Wesley W. Terpstra b4b165112c PeripheryErrorSlave: do not put a TLMonitor between the fragmenter and slave
This edge has the largest number of source bits by far. Let's just exclude it.
2017-06-13 16:59:29 -07:00
..
Configs.scala
tilelink2: remove ready-valid fuzzer obsoleted by TLDelayer
2017-05-17 06:47:21 -07:00
DebugTransport.scala
Add a note to wire up jtag_mfr_id (#778)
2017-06-02 18:53:14 -07:00
ExampleTop.scala
rocketchip: top-level systems are now multi-IO modules
2017-06-13 13:55:45 -07:00
Generator.scala
Fix description of LR/SC test suites
2017-04-18 00:47:58 -07:00
Periphery.scala
PeripheryErrorSlave: do not put a TLMonitor between the fragmenter and slave
2017-06-13 16:59:29 -07:00
RISCVPlatform.scala
rocketchip: top-level systems are now multi-IO modules
2017-06-13 13:55:45 -07:00
RocketPlexMaster.scala
rocketchip: top-level systems are now multi-IO modules
2017-06-13 13:55:45 -07:00
RocketTestSuite.scala
Filter out duplicate test suites
2017-04-24 02:01:15 -07:00
System.scala
rocketchip: top-level systems are now multi-IO modules
2017-06-13 13:55:45 -07:00
TestHarness.scala
rocketchip: top-level systems are now multi-IO modules
2017-06-13 13:55:45 -07:00
Utils.scala
bootrom: follow SBI (a0=hartid, a1=dtb)
2017-03-24 18:18:01 -07:00
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