riscv/rocket-chip
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rocket-chip/src/main/scala/tile
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Andrew Waterman 24a2278fc4 Perform all illegal-instruction detection in ID stage 
This is simpler, reduces what would have become a critical path in
the commit stage, and will make it easier to support the mbadinst
CSR if it is implemented.
2017-03-09 11:29:51 -08:00
..
BaseTile.scala rocket: allow scratchpad address to be configurable (#570) 2017-03-06 21:35:45 -08:00
Core.scala WIP on priv-1.10 2017-03-09 11:29:51 -08:00
FPU.scala Perform all illegal-instruction detection in ID stage 2017-03-09 11:29:51 -08:00
Interrupts.scala Heterogeneous Tiles (#550) 2017-02-09 13:59:09 -08:00
L1Cache.scala rocket: allow scratchpad address to be configurable (#570) 2017-03-06 21:35:45 -08:00
LegacyRoCC.scala Heterogeneous Tiles (#550) 2017-02-09 13:59:09 -08:00
Package.scala Heterogeneous Tiles (#550) 2017-02-09 13:59:09 -08:00