| .. |
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ALU.scala
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Don't route branch comparison result through ALU output mux
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2017-10-07 17:36:24 -07:00 |
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AMOALU.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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Breakpoint.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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BTB.scala
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Improve frontend branch prediction
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2017-11-09 00:00:56 -08:00 |
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BusErrorUnit.scala
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Provide separate masks for local & global BusErrorUnit interrupts
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2017-11-06 18:03:59 -08:00 |
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Consts.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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CSR.scala
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Don't permit vectoring of high interrupts
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2017-11-07 01:59:30 -08:00 |
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DCache.scala
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Revert "Avoid data corruption under correctable tag error during flush (#1130)"
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2017-11-29 16:09:30 -08:00 |
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Decode.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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Events.scala
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Add method to print perf events
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2017-07-25 15:19:16 -07:00 |
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Frontend.scala
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Improve frontend branch prediction
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2017-11-09 00:00:56 -08:00 |
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HellaCache.scala
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coreplex: first cut at using RocketCrossingParams
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2017-10-10 12:02:04 -07:00 |
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HellaCacheArbiter.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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IBuf.scala
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Improve frontend branch prediction
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2017-11-09 00:00:56 -08:00 |
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ICache.scala
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icache: add a couple cover points for I$ and ITIM iteraction
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2017-11-20 13:14:38 -08:00 |
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IDecode.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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Instructions.scala
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Add RVC instruction patterns
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2017-07-25 15:19:16 -07:00 |
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Multiplier.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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NBDcache.scala
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tilelink: split Acquire into Acquire{Block,Perm} (#1030)
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2017-10-05 12:49:49 -07:00 |
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package.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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PMP.scala
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Move microarchitecture-neutral params from Rocket to Core
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2017-10-03 17:34:18 -07:00 |
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PTW.scala
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Don't emit PTW covers when !usingVM
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2017-11-03 15:03:27 -07:00 |
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RocketCore.scala
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Provide option to support AMOs only on I/O, not DTIM/D$
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2017-11-09 17:45:53 -08:00 |
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RVC.scala
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Expand C.UNIMP correctly (#1052)
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2017-10-12 14:00:14 -07:00 |
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ScratchpadSlavePort.scala
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tile: bus blocker needs to know width :(
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2017-11-17 20:17:17 -08:00 |
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SimpleHellaCacheIF.scala
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Refactor package hierarchy and remove legacy bus protocol implementations (#845)
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2017-07-07 10:48:16 -07:00 |
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TLB.scala
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Provide option to support AMOs only on I/O, not DTIM/D$
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2017-11-09 17:45:53 -08:00 |
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TLBPermissions.scala
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rocket: only cache when AcquireT is possible
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2017-10-10 18:06:58 -07:00 |
