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rocket-chip/src
Andrew Waterman 2e8b02e780 Merge D$ store hits when ECC is enabled
This avoids pipeline flushes due to subword WAW hazards, as with
consecutive byte stores.
2017-07-28 12:56:36 -07:00
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main/scala Merge D$ store hits when ECC is enabled 2017-07-28 12:56:36 -07:00