568bfa6c50
The SCR file is gone, too, because it was tightly coupled. The general concept could be revived as a module that somehow connects to the debug module.
81 lines
3.9 KiB
Plaintext
81 lines
3.9 KiB
Plaintext
#--------------------------------------------------------------------
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# Verilator Generation
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#--------------------------------------------------------------------
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firrtl = $(generated_dir)/$(MODEL).$(CONFIG).fir
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firrtl_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).fir
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verilog = $(generated_dir)/$(MODEL).$(CONFIG).v
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verilog_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).v
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.SECONDARY: $(firrtl) $(firrtl_debug) $(verilog) $(verilog_debug)
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$(generated_dir)/%.$(CONFIG).fir $(generated_dir)/%.$(CONFIG).prm $(generated_dir)/%.$(CONFIG).d: $(chisel_srcs)
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mkdir -p $(dir $@)
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cd $(base_dir) && $(SBT) "run $(PROJECT) $(MODEL) $(CONFIG) --targetDir $(generated_dir)"
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mv $(generated_dir)/$(MODEL).fir $(generated_dir)/$(MODEL).$(CONFIG).fir
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$(generated_dir_debug)/%.$(CONFIG).fir $(generated_dir_debug)/%.$(CONFIG).prm $(generated_dir_debug)/%.$(CONFIG).d: $(chisel_srcs)
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mkdir -p $(dir $@)
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cd $(base_dir) && $(SBT) "run $(PROJECT) $(MODEL) $(CONFIG) --targetDir $(generated_dir_debug)"
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mv $(generated_dir_debug)/$(MODEL).fir $(generated_dir_debug)/$(MODEL).$(CONFIG).fir
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%.v: %.fir $(FIRRTL_JAR)
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mkdir -p $(dir $@)
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$(FIRRTL) $(patsubst %,-i %,$(filter %.fir,$^)) -o $@ -X verilog
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# Build and install our own Verilator, to work around versionining issues.
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VERILATOR_VERSION=3.884
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VERILATOR_SRCDIR=verilator/src/verilator-$(VERILATOR_VERSION)
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INSTALLED_VERILATOR=$(abspath verilator/install/bin/verilator)
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$(INSTALLED_VERILATOR): $(VERILATOR_SRCDIR)/bin/verilator
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$(MAKE) -C $(VERILATOR_SRCDIR) installbin installdata
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touch $@
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$(VERILATOR_SRCDIR)/bin/verilator: $(VERILATOR_SRCDIR)/Makefile
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$(MAKE) -C $(VERILATOR_SRCDIR) verilator_bin
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touch $@
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$(VERILATOR_SRCDIR)/Makefile: $(VERILATOR_SRCDIR)/configure
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mkdir -p $(dir $@)
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cd $(dir $@) && ./configure --prefix=$(abspath verilator/install)
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$(VERILATOR_SRCDIR)/configure: verilator/verilator-$(VERILATOR_VERSION).tar.gz
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rm -rf $(dir $@)
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mkdir -p $(dir $@)
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cat $^ | tar -xz --strip-components=1 -C $(dir $@)
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touch $@
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verilator/verilator-$(VERILATOR_VERSION).tar.gz:
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mkdir -p $(dir $@)
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wget http://www.veripool.org/ftp/verilator-$(VERILATOR_VERSION).tgz -O $@
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# Run Verilator to produce a fast binary to emulate this circuit.
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VERILATOR := $(INSTALLED_VERILATOR) --cc --exe
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VERILATOR_FLAGS := --top-module $(MODEL) +define+PRINTF_COND=\$$c\(\"verbose\"\) --assert \
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-Wno-UNSIGNED -Wno-COMBDLY -Wno-MULTIDRIVEN -Wno-WIDTH -Wno-STMTDLY -Wno-SELRANGE -Wno-IMPLICIT \
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-CFLAGS "$(CXXFLAGS) -DVERILATOR -include $(base_dir)/csrc/verilator.h"
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cppfiles = $(addprefix $(base_dir)/csrc/, $(addsuffix .cc, $(CXXSRCS)))
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model_header = $(generated_dir)/$(MODEL).$(CONFIG)/V$(MODEL).h
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model_header_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG)/V$(MODEL).h
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$(addsuffix .o,$(CXXSRCS)): %.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(consts_header)
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$(CXX) $(CXXFLAGS) -DVERILATOR -I$(generated_dir) -c -o $@ $<
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$(addsuffix .debug.o,$(CXXSRCS)): %.debug.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(consts_header_debug)
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$(CXX) $(CXXFLAGS) -DVERILATOR -I$(generated_dir_debug) -c -o $@ $<
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$(emu): $(verilog) $(cppfiles) libdramsim.a $(consts_header) $(INSTALLED_VERILATOR)
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mkdir -p $(generated_dir)/$(MODEL).$(CONFIG)
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$(VERILATOR) $(VERILATOR_FLAGS) -Mdir $(generated_dir)/$(MODEL).$(CONFIG) \
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-o $(abspath $(sim_dir))/$@ $< $(cppfiles) -LDFLAGS "$(LDFLAGS)" \
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-CFLAGS "-I$(generated_dir) -include $(model_header) -include $(consts_header)"
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$(MAKE) -C $(generated_dir)/$(MODEL).$(CONFIG) -f V$(MODEL).mk
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$(emu_debug): $(verilog_debug) $(cppfiles) libdramsim.a $(consts_header_debug) $(generated_dir)/$(MODEL).$(CONFIG).d $(INSTALLED_VERILATOR)
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mkdir -p $(generated_dir_debug)/$(MODEL).$(CONFIG)
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$(VERILATOR) $(VERILATOR_FLAGS) -Mdir $(generated_dir_debug)/$(MODEL).$(CONFIG) --trace \
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-o $(abspath $(sim_dir))/$@ $< $(cppfiles) -LDFLAGS "$(LDFLAGS)" \
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-CFLAGS "-I$(generated_dir_debug) -include $(model_header_debug) -include $(consts_header_debug)"
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$(MAKE) -C $(generated_dir_debug)/$(MODEL).$(CONFIG) -f V$(MODEL).mk
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