a073c37e36
We used to just be writing the SCR anyway, but now that the SCR maps are automatically defined VCS will detect the missing SCR and bail out when compiling test harness code. This patch just doesn't write the HTIF SCR when there isn't one.
51 lines
1.2 KiB
C++
51 lines
1.2 KiB
C++
// See LICENSE for license details.
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#ifndef _HTIF_EMULATOR_H
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#define _HTIF_EMULATOR_H
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#include <fesvr/htif_pthread.h>
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class htif_emulator_t : public htif_pthread_t
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{
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int memory_channel_mux_select;
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public:
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htif_emulator_t(uint32_t memsz_mb, const std::vector<std::string>& args)
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: htif_pthread_t(args),
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memory_channel_mux_select(0)
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{
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this->_memsz_mb = memsz_mb;
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for (const auto& arg: args) {
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if (!strncmp(arg.c_str(), "+memory_channel_mux_select=", 27))
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memory_channel_mux_select = atoi(arg.c_str()+27);
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}
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}
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void set_clock_divisor(int divisor, int hold_cycles)
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{
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#ifdef UNCORE_SCR__HTIF_IO_CLOCK_DIVISOR
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/* We only want to write the HTIF clock divisor SCR on targets where it
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* actually exists (there isn't one on the FPGA, for example). */
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write_cr(-1, UNCORE_SCR__HTIF_IO_CLOCK_DIVISOR, divisor | hold_cycles << 16);
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#endif
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}
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void start()
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{
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set_clock_divisor(5, 2);
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write_cr(-1, UNCORE_SCR__MEMORY_CHANNEL_MUX_SELECT, memory_channel_mux_select);
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htif_pthread_t::start();
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}
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uint32_t mem_mb() {
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uint32_t scr_mb = htif_pthread_t::mem_mb();
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return (_memsz_mb < scr_mb) ? _memsz_mb : scr_mb;
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}
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private:
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uint32_t _memsz_mb;
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};
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#endif
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