85 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Scala
		
	
	
	
	
	
			
		
		
	
	
			85 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Scala
		
	
	
	
	
	
| // See LICENSE for license details.
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| 
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| package rocketchip
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| 
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| import rocket.{XLen, UseVM, UseAtomics, UseCompressed, FPUKey}
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| import scala.collection.mutable.LinkedHashSet
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| 
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| /** A Generator for platforms containing Rocket Coreplexes */
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| object Generator extends util.GeneratorApp {
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| 
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|   val rv64RegrTestNames = LinkedHashSet(
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|         "rv64ud-v-fcvt",
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|         "rv64ud-p-fdiv",
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|         "rv64ud-v-fadd",
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|         "rv64uf-v-fadd",
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|         "rv64um-v-mul",
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|         "rv64mi-p-breakpoint",
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|         "rv64uc-v-rvc",
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|         "rv64ud-v-structural",
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|         "rv64si-p-wfi",
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|         "rv64um-v-divw",
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|         "rv64ua-v-lrsc",
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|         "rv64ui-v-fence_i",
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|         "rv64ud-v-fcvt_w",
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|         "rv64uf-v-fmin",
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|         "rv64ui-v-sb",
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|         "rv64ua-v-amomax_d",
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|         "rv64ud-v-move",
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|         "rv64ud-v-fclass",
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|         "rv64ua-v-amoand_d",
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|         "rv64ua-v-amoxor_d",
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|         "rv64si-p-sbreak",
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|         "rv64ud-v-fmadd",
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|         "rv64uf-v-ldst",
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|         "rv64um-v-mulh",
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|         "rv64si-p-dirty")
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| 
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|   val rv32RegrTestNames = LinkedHashSet(
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|       "rv32mi-p-ma_addr",
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|       "rv32mi-p-csr",
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|       "rv32ui-p-sh",
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|       "rv32ui-p-lh",
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|       "rv32uc-p-rvc",
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|       "rv32mi-p-sbreak",
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|       "rv32ui-p-sll")
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| 
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|   override def addTestSuites {
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|     import DefaultTestSuites._
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|     val xlen = params(XLen)
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|     val vm = params(UseVM)
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|     val env = if (vm) List("p","v") else List("p")
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|     params(FPUKey) foreach { case cfg =>
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|       if (xlen == 32) {
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|         TestGeneration.addSuites(env.map(rv32ufNoDiv))
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|       } else {
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|         TestGeneration.addSuite(rv32udBenchmarks)
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|         TestGeneration.addSuites(env.map(rv64ufNoDiv))
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|         TestGeneration.addSuites(env.map(rv64udNoDiv))
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|         if (cfg.divSqrt) {
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|           TestGeneration.addSuites(env.map(rv64uf))
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|           TestGeneration.addSuites(env.map(rv64ud))
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|         }
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|       }
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|     }
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|     if (params(UseAtomics))    TestGeneration.addSuites(env.map(if (xlen == 64) rv64ua else rv32ua))
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|     if (params(UseCompressed)) TestGeneration.addSuites(env.map(if (xlen == 64) rv64uc else rv32uc))
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|     val (rvi, rvu) =
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|       if (xlen == 64) ((if (vm) rv64i else rv64pi), rv64u)
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|       else            ((if (vm) rv32i else rv32pi), rv32u)
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| 
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|     TestGeneration.addSuites(rvi.map(_("p")))
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|     TestGeneration.addSuites((if (vm) List("v") else List()).flatMap(env => rvu.map(_(env))))
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|     TestGeneration.addSuite(benchmarks)
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|     TestGeneration.addSuite(new RegressionTestSuite(if (xlen == 64) rv64RegrTestNames else rv32RegrTestNames))
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|   }
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| 
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|   val longName = names.topModuleProject + "." + names.configs
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|   generateFirrtl
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|   generateTestSuiteMakefrags
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|   generateDSEConstraints
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|   generateConfigString
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|   generateGraphML
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|   generateParameterDump
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| }
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