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riscv/rocket-chip
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05100c12a7bf5eb4a6c3730dad552735ea9c20aa
rocket-chip/src/main/scala/rocketchip
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Howard Mao f3cdeb08c6 pass nMemChannels to coreplex through CoreplexConfig
2016-09-12 12:40:10 -07:00
..
Configs.scala
allow configuration of simulation memory latency
2016-09-12 12:33:50 -07:00
DebugTransport.scala
connect testharness components via member functions (#236)
2016-09-01 18:38:39 -07:00
Generator.scala
now able to add periphery devices through traits
2016-09-10 23:39:29 -07:00
Periphery.scala
now able to add periphery devices through traits
2016-09-10 23:39:29 -07:00
TestConfigs.scala
now able to add periphery devices through traits
2016-09-10 23:39:29 -07:00
TestHarness.scala
allow configuration of simulation memory latency
2016-09-12 12:33:50 -07:00
Top.scala
pass nMemChannels to coreplex through CoreplexConfig
2016-09-12 12:40:10 -07:00
Utils.scala
now able to add periphery devices through traits
2016-09-10 23:39:29 -07:00
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