75 lines
3.1 KiB
Scala
75 lines
3.1 KiB
Scala
// See LICENSE for license details.
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package unittest
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import Chisel._
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import cde.{Parameters, Config, CDEMatchError}
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import rocketchip.{BaseConfig, BasePlatformConfig}
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class WithJunctionsUnitTests extends Config(
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(pname, site, here) => pname match {
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case junctions.PAddrBits => 32
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case rocket.XLen => 64
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case UnitTests => (p: Parameters) => Seq(
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Module(new junctions.MultiWidthFifoTest),
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Module(new junctions.HastiTest()(p)))
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case _ => throw new CDEMatchError
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})
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class JunctionsUnitTestConfig extends Config(new WithJunctionsUnitTests ++ new BasePlatformConfig)
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class WithUncoreUnitTests extends Config(
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(pname, site, here) => pname match {
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case rocketchip.NCoreplexExtClients => 0
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case uncore.tilelink.TLId => "L1toL2"
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case UnitTests => (p: Parameters) => Seq(
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Module(new uncore.devices.ROMSlaveTest()(p)),
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Module(new uncore.devices.TileLinkRAMTest()(p)),
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Module(new uncore.converters.TileLinkWidthAdapterTest()(p)),
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Module(new uncore.tilelink2.TLFuzzRAMTest),
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Module(new uncore.axi4.AXI4LiteFuzzRAMTest),
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Module(new uncore.axi4.AXI4FullFuzzRAMTest),
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Module(new uncore.axi4.AXI4BridgeTest))
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case _ => throw new CDEMatchError
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}
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)
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class UncoreUnitTestConfig extends Config(new WithUncoreUnitTests ++ new BaseConfig)
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class WithTLSimpleUnitTests extends Config(
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(pname, site, here) => pname match {
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case UnitTests => (p: Parameters) => {
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Seq(
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Module(new uncore.tilelink2.TLRAMSimpleTest(1)),
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Module(new uncore.tilelink2.TLRAMSimpleTest(4)),
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Module(new uncore.tilelink2.TLRAMSimpleTest(16)),
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Module(new uncore.tilelink2.TLRR0Test),
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Module(new uncore.tilelink2.TLRR1Test),
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Module(new uncore.tilelink2.TLRAMCrossingTest) ) }
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case _ => throw new CDEMatchError })
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class WithTLWidthUnitTests extends Config(
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(pname, site, here) => pname match {
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case UnitTests => (p: Parameters) => { Seq(
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Module(new uncore.tilelink2.TLRAMFragmenterTest( 4, 256)),
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Module(new uncore.tilelink2.TLRAMFragmenterTest(16, 64)),
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Module(new uncore.tilelink2.TLRAMFragmenterTest( 4, 16)),
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Module(new uncore.tilelink2.TLRAMWidthWidgetTest( 1, 1)),
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Module(new uncore.tilelink2.TLRAMWidthWidgetTest( 4, 64)),
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Module(new uncore.tilelink2.TLRAMWidthWidgetTest(64, 4)) ) }
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case _ => throw new CDEMatchError })
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class WithTLXbarUnitTests extends Config(
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(pname, site, here) => pname match {
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case UnitTests => (p: Parameters) => { Seq(
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Module(new uncore.tilelink2.TLRAMXbarTest(1)),
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Module(new uncore.tilelink2.TLRAMXbarTest(2)),
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Module(new uncore.tilelink2.TLRAMXbarTest(8)),
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//Module(new uncore.tilelink2.TLMulticlientXbarTest(4,4)),
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Module(new uncore.tilelink2.TLMulticlientXbarTest(1,4)) ) }
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case _ => throw new CDEMatchError })
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class TLSimpleUnitTestConfig extends Config(new WithTLSimpleUnitTests ++ new BasePlatformConfig)
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class TLWidthUnitTestConfig extends Config(new WithTLWidthUnitTests ++ new BasePlatformConfig)
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class TLXbarUnitTestConfig extends Config(new WithTLXbarUnitTests ++ new BasePlatformConfig)
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