rocket-chip /

csrc/emulator.cc

csrc/htif_emulator.h

csrc/mm_dramsim2.cc

csrc/mm_dramsim2.h

csrc/mm.cc

csrc/mm.h

csrc/vcs_main.cc

emulator/dramsim2_ini/DDR3_micron_64M_8B_x4_sg15.ini

emulator/dramsim2_ini/system.ini

emulator/Makefile

fsim/fpga_mem_gen

fsim/Makefile

fsim/Makefrag

LICENSE

Makefrag

project/build.properties

project/build.scala

project/plugins.sbt

README.md

regression.sh

sbt-launch.jar

src/main/scala/Backends.scala

src/main/scala/Network.scala

src/main/scala/PublicConfigs.scala

src/main/scala/RocketChip.scala

src/main/scala/Vlsi.scala

vsim/Makefile

vsim/Makefrag

vsim/Makefrag-sim

vsim/vlsi_mem_gen

vsrc/backup_mem.v

vsrc/rocketTestHarness.v

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