riscv/rocket-chip
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3 Commits

Author SHA1 Message Date
Wesley W. Terpstra
7c334e3c34 axi4 ToTL: shorter critical path on Q.bits if errors go first 2016-10-17 01:00:49 -07:00
Wesley W. Terpstra
73010c79a3 axi4 ToTL: handle bad AXI addresses 2016-10-17 00:12:26 -07:00
Wesley W. Terpstra
5a1da63b5a axi4: prototype ToTL adapter 2016-10-16 22:04:01 -07:00