7 Commits

Author	SHA1	Message	Date
Howard Mao	9910c69c67	Move a bunch more things into util package ... A lot of utility code was just being imported willy-nilly from one package to another. This moves the common code into util to make things more sensible. The code moved were * The AsyncQueue and AsyncDecoupledCrossing from junctions. * All of the code in rocket's util.scala * The BlackBox asynchronous reset registers from uncore.tilelink2 * The implicit definitions from uncore.util	2016-09-29 14:23:42 -07:00
Megan Wachs	3ce08f40a5	crossing: Remove reset from the logic in Register Crossing because it is no longer needed when the underlying crossings are asynchronously reset. Update the order of operations	2016-09-27 13:36:28 -07:00
Henry Cook	1b53e477fa	Merge branch 'master' of github.com:ucb-bar/rocket-chip into tl2-irrevocable	2016-09-14 17:50:17 -07:00
Henry Cook	e02d149cbe	[tilelink2] Convert TileLink2 to use IrrevocableIO. Add checks to the Monitor to enforce Irrevocable semantics on TLEdges. Update the RegisterRouterTests to pass the new Monitor assertions.	2016-09-14 17:43:07 -07:00
Megan Wachs	1308680f75	Add some async/clock utilities	2016-09-14 16:30:59 -07:00
mwachs5	47acbf928b	Give AsyncCrossing slave interfaces registers visibility into when they were written (#288)	2016-09-14 00:17:26 -07:00
Wesley W. Terpstra	fe6a67dd0e	tilelink2: add a RegisterCrossing primitive	2016-09-13 18:33:53 -07:00