riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

jtag: clean up debug flags in regression/Makefile

Browse Source
This commit is contained in:
Megan Wachs 2016-09-27 11:27:22 -07:00 committed by Andrew Waterman
parent 45bd63fcc6
commit fc4d6ed0c6
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
regression/Makefile
View File

@ -220,16 +220,16 @@ install_openocd: $(OPENOCD_DIR)/bin/openocd
# Running a list of tests is not supported. # Running a list of tests is not supported.
JTAG_DTM_TEST ?= SimpleRegisterTest.test_s0 JTAG_DTM_TEST ?= SimpleRegisterTest.test_s0
stamps/%/jtag-dtm-32-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-debug.stamp stamps/%/jtag-dtm-32-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-ndebug.stamp
$(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \ $(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \
--run "$(abspath $(TOP))/vsim/simv-$(PROJECT)-$*-debug +verbose +vcdplusfile=foo.vpd" \ --run "$(abspath $(TOP))/vsim/simv-$(PROJECT)-$*" \
--cmd="$(OPENOCD_DIR)/bin/openocd -d \ --cmd="$(OPENOCD_DIR)/bin/openocd -d \
--s $(OPENOCD_DIR)/share/openocd/scripts" \ --s $(OPENOCD_DIR)/share/openocd/scripts" \
--freedom-e300-sim \ --freedom-e300-sim \
$(JTAG_DTM_TEST) $(JTAG_DTM_TEST)
date > $@ date > $@
stamps/%/jtag-dtm-64-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-debug.stamp stamps/%/jtag-dtm-64-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-ndebug.stamp
$(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \ $(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \
--run $(abspath $(TOP))/vsim/simv-$(PROJECT)-$* \ --run $(abspath $(TOP))/vsim/simv-$(PROJECT)-$* \
--cmd="$(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/bin/openocd -d \ --cmd="$(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/bin/openocd -d \