riscv/rocket-chip
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rocketchip: globals are for sissies

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Wesley W. Terpstra committed 2016-09-15 21:28:56 -07:00
1 parent 644f8fe974
commit fb24e847fd
11 files changed
+74 -66
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src/main/scala/junctions/addrmap.scala
+1 -1
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@@ -12,7 +12,7 @@ trait HasAddrMapParameters {
implicit val p: Parameters
val paddrBits = p(PAddrBits)
def addrMap = p(rocketchip.GlobalAddrMap).get
def addrMap = p(rocketchip.GlobalAddrMap)
}
case class MemAttr(prot: Int, cacheable: Boolean = false)